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vunit

Here are 14 public repositories matching this topic...

Unike267 / Practices

This repo contains the work developed in the SIEAV Master practices 🎓✏️📚

fpga master ghdl vunit neorv32 sieav

Updated Nov 11, 2024
VHDL

rei / vunit

Write unit tests against your Vue components using mocha and @vue/test-utils

unit-testing mocha vue-components code-coverage vunit

Updated Jan 7, 2023
JavaScript

stnolting / neorv32-vunit

Simulating the NEORV32 RISC-V Processor using the VUnit testing framework.

testing simulation verification vunit neorv32

Updated Nov 11, 2024
VHDL

tivaliy / ghdl-jenkins-swarm-slave

Docker-based Jenkins swarm slave client with GHDL software

docker-container vhdl jenkins-jobs ci-infrastructure ghdl vunit jenkins-swarm

Updated Apr 4, 2017
Shell

HSD-ESD / VUnit-by-HGB

VUnit-by-HGB is a VS-Code extension which enables the testexplorer for VUnit projects.

vhdl vscode-extension vunit unittesting digital-design regressiontesting

Updated Jan 29, 2024
TypeScript

Zeigren / QMSV

SublimeText3 bits for Quartus, ModelSim, and VUnit Integration mirror of https://phabricator.kairohm.dev/diffusion/10/

sublime-text systemverilog modelsim vunit quartus

Updated Sep 9, 2018
SystemVerilog

VUnit / cosim

Interfacing VHDL and foreign languages with VUnit

python unit-testing vhdl ffi verification dpi vunit vpi cosimulation vhpidirect

Updated Feb 20, 2020
Python

dbhi / containers

Containerized open and free development tools for Dynamic Binary Hardware Injection (DBHI)

docker arm zynq octave pynq gtkwave ghdl vunit dynamorio multiarch podman

Updated Jan 24, 2023
Dockerfile

embed-me / vunit-mode

A simple Emacs minor mode for VUnit

package emacs vhdl vunit

Updated Sep 13, 2023
Emacs Lisp

tsfpga

tsfpga / tsfpga

A flexible and scalable development platform for modern FPGA projects.

asic fpga ci simulation test vhdl build-automation eda test-automation rtl verilog xilinx synthesis vivado systemverilog implementation vunit

Updated Nov 15, 2024
Python

umarcor / SIEAV

Co-simulation and behavioural verification with VHDL, C/C++ and Python/m

matlab octave gtkwave ghdl vunit cosim co-simulation

Updated Nov 14, 2024
VHDL

VHDL / Compliance-Tests

Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

fpga simulation vhdl vunit cosimulation

Updated Nov 17, 2024
VHDL

ghdl / docker

Scripts to build and use docker images including GHDL

dockerfiles hardware ci simulation vhdl actions verilog synthesis icestorm gtkwave ghdl testbench vunit yosys openocd pnr nextpnr prjtrellis

Updated Jun 6, 2024
Shell

VLSI-EDA / PoC

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

Updated Nov 29, 2020
VHDL

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