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R4

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RISC-V subset

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Name		Name	Last commit message	Last commit date
sample/cpu		sample/cpu
vivado/R4_hello		vivado/R4_hello
.gitignore		.gitignore
Makefile		Makefile
README.md		README.md
alu.sv		alu.sv
alu_test.sv		alu_test.sv
cpu.sv		cpu.sv
cpu_test.sv		cpu_test.sv
decoder.sv		decoder.sv
decoder_test.sv		decoder_test.sv
immgen.sv		immgen.sv
immgen_test.sv		immgen_test.sv
instructions.sv		instructions.sv
regfile.sv		regfile.sv
regfile_test.sv		regfile_test.sv
run_test.sh		run_test.sh
top_test.sv		top_test.sv
ulx3s_top.sv		ulx3s_top.sv
ulx3s_v20.lpf		ulx3s_v20.lpf

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RISC-V subset

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