[go: up one dir, main page]
Skip to content
/ CMOS-OTA-design-using-Cadence-45nm-process-technology Public

A 2 stage CMOS OTA with Differential amplifier with active load as the first stage followed by Common Source stage using Cadence

2 stars 2 forks Branches Tags Activity
Star
Notifications You must be signed in to change notification settings

ranjith-dhananjaya/CMOS-OTA-design-using-Cadence-45nm-process-technology

BranchesTags

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

7 Commits
AC analysis
AC analysis
 
 
Cadence Circuit Design
Cadence Circuit Design
 
 
DC analysis
DC analysis
 
 
transcient analysis
transcient analysis
 
 
README.md
README.md
 
 

Repository files navigation

2 stage CMOS OTA with Differential amplifier with active load as the first stage followed by Common Source stage using Cadence

About

A 2 stage CMOS OTA with Differential amplifier with active load as the first stage followed by Common Source stage using Cadence

Topics

ota bandwidth gain uci amplifier electrical-engineering cadence-virtuoso mixed-signal cmos masters analog-design electronics-engineering opamp cadence-spectre 45nm miller-effect

Resources

Readme
Activity

Stars

2 stars

Watchers

1 watching

Forks

2 forks
Report repository

Releases

No releases published

Packages

No packages published