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A plate solving telescope finder based around a Raspberry PI and RPI HQ Camera
A free, open source C# framework for making games, or your own game engine. Direct access to native APIs and Vulkan, with the low-level libraries around them. The foundation under Kitten Space Agen…
A physical digital pet you keep alive — ESP32-S3 firmware and an Android app that does all the thinking on-device.
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
A simple utility for running exhaustiveness checks on Go "sum types."
A simple utility for running exhaustiveness checks on Go "sum types."
Exhaustiveness checks for your interface "sum types" using a lightweight naming convention + `go vet`.
Submission template for Tiny Tapeout IHP shuttles - Verilog HDL Projects
Chisel: A Modern Hardware Design Language
Open-Source Framework for Numerically-Tailored Computations This project is "An Open-Source Framework for Efficient Numerically-Tailored Computations", hence the acronym OSFNTC. The title of the co…
Exploring if we can write lazy HDL and let the OSS tools optimize our sloppiness. Spoiler: We absolutely can!
Pushing the bf16 multiplication clock frequency to the max on the nominal corner on IHP 130nm 5L node.
RTL implementation of a performance/area optimized bfloat16 adder and multiplication.
A minimal GPU design in Verilog to learn how GPUs work from the ground up
Generate monophonic melodies with machine learning using a basic LSTM RNN
ASIC implementation flow infrastructure, successor to OpenLane