[go: up one dir, main page]

Skip to content
View billmcspadden-riscv's full-sized avatar
  • RISC-V International
  • Chanhassen, MN, USA

Block or report billmcspadden-riscv

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
  • 👋 Hi, I’m @billmcspadden-riscv
  • 👀 I’m interested in the RISC-V Sail model
  • 🌱 I’m currently learning Sail.
  • 💞️ I’m looking to collaborate on ...
  • 📫 How to reach me: email: bill@riscv.org mobile: 503-807-9309 (US)

I have other github accounts, but this is the one that I use for my work on RISCV.

Popular repositories Loading

  1. sail-riscv sail-riscv Public

    Forked from riscv/sail-riscv

    Sail RISC-V model

    Coq 4

  2. sail sail Public

    Forked from rems-project/sail

    Sail architecture definition language

    Isabelle 2

  3. billmcspadden-riscv billmcspadden-riscv Public

    Config files for my GitHub profile.

  4. riscv-config riscv-config Public

    Forked from riscv-software-src/riscv-config

    RISC-V Configuration Validator

    Python

  5. riscv-trace-spec riscv-trace-spec Public

    Forked from riscv-non-isa/riscv-trace-spec

    Working Draft of the RISC-V Processor Trace Specification

    C

  6. pmake pmake Public

    make replacement using python

    Python