8000 [determinism] Preserve IEEE FP32 dot inputs by dlwh · Pull Request #117 · marin-community/vllm · GitHub
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[determinism] Preserve IEEE FP32 dot inputs - #117

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codex/grug-ieee-fp32-source-20261105
Nov 6, 2026
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dlwh merged 1 commit into
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codex/grug-ieee-fp32-source-20261105

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@dlwh
@dlwh dlwh commented Nov 6, 2026
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Use IEEE FP32 input precision in the persistent matmul, descriptor matmul and batched matmul kernels used by batch-invariant arithmetic. Triton's default dot precision can round FP32 inputs even when the caller expects the full FP32 mantissa. Add one-hot precision regressions with an independent exact answer, plus exact singleton, batched, permuted and CUDA-graph replay comparisons.

The corrected kernel file is byte-identical to the candidate exercised in the saved H100 qualification: two original-precision controls failed as expected, then all 47 operator/attention cases passed without skips. Four later full-length Grug DP8/EP8 evaluations independently graded all 100 tasks each and matched exactly under the tested deterministic compiler policy. Those measurements used vLLM 02872a7 plus this kernel change, not the proposed f6ae232ff3747569233ce9fce99ec4e05dbec6b6 base, which includes newer FP8 support. On that base, required lint, focused Ruff checks, syntax and exact source/AST checks pass; GPU regressions have not been rerun. The historical GPU results neither establish universal determinism nor isolate the cause of prior full-model variation.

This is a source fix. Wheel publication and consumer adoption retain their separate release and application gates. The change lets the reproducibility note in marin-community/marin#10760 reference maintained source instead of a patch attachment.

Use explicit IEEE input precision in batch-invariant matmul kernels and cover FP32 precision and exact batch/permutation/CUDA-graph behavior.
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Non-blocking: do we have before/after timings for representative FP32 router projections, or serving throughput?

dlwh commented Nov 6, 2026
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🤖 No before/after router timings or serving-throughput measurements yet. The recorded GPU results cover numerical correctness on the earlier 02872a7 base with the same corrected module bytes; they do not measure the performance cost on this PR’s full base. I’ll keep that limit explicit rather than infer performance from the correctness tests.

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dlwh merged commit 5fa2e9b into main Nov 6, 2026
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dlwh deleted the codex/grug-ieee-fp32-source-20261105 branch November 6, 2026 03:50
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