A simple superscalar out-of-order RISC-V microprocessor

RiVEC Bencmark Suite

HomebrewGPU is a simple ray tracing GPU on FPGA which implements basic ray-primitive intersection, BVH traversal, shadowing, reflection and refraction. This is a project I used to learn programming…

x86-64, ARM, and RVV intrinsics viewer

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

A monitor of resources

Unified Communication X (mailing list - https://elist.ornl.gov/mailman/listinfo/ucx-group)

Xv6 for RISC-V

PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

A FPGA friendly 32 bit RISC-V CPU implementation

Build your hardware, easily!

Easily portable doom

GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for features such as TensorCores and CUDA Dynamic Parallelism as…

A fancy self-hosted monitoring tool

Writing an OS in 1,000 lines.

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

Basic Common Modules

Documentation of NVIDIA chip/hardware interfaces

A simple open-source disk benchmark tool for Linux distros

Assembler for NVIDIA Maxwell architecture

RSD: RISC-V Out-of-Order Superscalar Processor

GPU移植のための実装例（直接法に基づくN体計算）

RAFT contains fundamental widely-used algorithms and primitives for machine learning and information retrieval. The algorithms are CUDA-accelerated and form building blocks for more easily writing …

Chromium running inside your terminal

Proc-macro based einsum implementation for rust-ndarray

METIS - Serial Graph Partitioning and Fill-reducing Matrix Ordering