AI Infrastructure Researcher · ApxInf Core Developer · Ph.D. Student, Beihang University
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Stars across my public repositories, including forks and archived projects. Refreshed daily.
I am a core developer of ApxInf, Infinigence AI's open-source inference engine for embodied edge AI.
I build AI agents that generate and optimize executable systems and hardware, connecting models, GPU kernels, compilers, and circuit design. I'm pursuing a Ph.D. in Integrated Circuit Engineering at Beihang University (2023–present).
- AI + EDA — RTL generation, multimodal circuit understanding, and multi-agent design.
- AI systems — GPU kernel generation and optimization, compiler co-design, and reproducible evaluation.
- AI hardware — Computing-in-memory, FPGA deployment, and circuit optimization.
Currently: Turning expert kernel-optimization methods into executable workflows that connect generation, profiling, and evaluation.
- Helped Infinigence AI achieve first place on two SOL-ExecBench leaderboards.
- Contributed to GLM-5.3 inference optimization, reaching 630 tokens/s.
Tools to build with, and research collections to build on.
| Project | What you'll find |
|---|---|
| ApxInf | Core developer. A Rust and CUDA inference engine for embodied edge AI on NVIDIA Jetson Thor and Orin, with PI0.5 support. |
| Awesome-Kernel-Workflows | Expert kernel-optimization methods packaged as runnable agent workflows. |
| open-cake-ir | Agent-driven co-evolution of GPU kernels and compilers, with typed IR, structured feedback, and validated artifacts. |
| Awesome-LLM-Kernel-Agent | Papers, systems, and evaluation resources for LLM-driven kernel generation and optimization. |
| Awesome-LLM-Circuit-Agent | Research on LLM-based RTL and analog circuit generation. |
| Awesome-MegaKernel | Whole-model kernels, persistent runtimes, and deeply fused LLM systems. |
| gpu-infra | Kernel evaluation, GPU scheduling, and experiment evidence for agent workflows. |
More tools & hardware projects
- agent-gpu-broker — Single-host GPU queues with shared, exclusive, and atomic multi-GPU scheduling.
- ROCm-KernelWiki-Q — Kernel-optimization knowledge graph for AMD ROCm / CDNA.
- Digital-CIM — Digital computing-in-memory design in Verilog.
- Scientific-Figure-Design — Tools for publication-quality scientific figures.
CircuitWeave · arXiv preprint, 2026
Topology-behavior alignment for executable multimodal RTL generation, connecting schematics with natural-language specifications.
ReasoningV · ICAIS 2025 · Code
Efficient Verilog code generation with an adaptive hybrid reasoning model.
CircuitMind · arXiv preprint, 2025 · Code
Multi-agent collaboration and collective intelligence for circuit generation.
More publications · DAC, computing-in-memory & FPGA
| Year | Venue | Paper | Links |
|---|---|---|---|
| 2026 | IEEE NVMSA 2026 | Hardware-Aware Neural Network Deployment on Multi-Core In-Memory Computing Systems: A Compiler Perspective | Conference program |
| 2025 | DAC 2025 | Multi-Agent Yield Analysis for Circuit Design | DBLP |
| 2025 | DAC 2025 | Accuracy Is Not Always We Need: Precision-Aware Bayesian Yield Optimization | Beihang |
| 2025 | DAC 2025 | Efficient Weight Mapping and Resource Scheduling on Crossbar-based Multi-core CIM Systems | DAC program |
| 2025 | Integrated Circuits and Systems | A High-Resistance SOT Device Based Computing-in-Memory Macro for AI Edge Inference | DOI |
| 2023 | IEEE AICAS 2023 | Searching Tiny Neural Networks for Deployment on Embedded FPGA | IEEE Xplore · DBLP |
Full publication list · Google Scholar
Kernels & systems · CUDA Triton C++ Python ROCm Linux
Models & compilers · PyTorch SGLang llama.cpp TVM
Hardware · Verilog FPGA Computing-in-Memory
Open to research collaborations across kernel optimization, AI systems, and hardware design.
haiyanq@buaa.edu.cn · Research notes