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sycl-nightly/20210223

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[SYCL][PI][L0] Enables command batching in enqueueMemCopyHelper (inte…

…l#3232)

This change enables command batching for all commands that are
enqueued using enqueueMemCopyHelper.

sycl-nightly/20210220

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[SYCL] Fix incompatibility between OpenCL headers and ICD loader (int…

…el#3235)

sycl-nightly/20210219

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[SYCL][FPGA] Add mutual diagnostic for num_simd_work_items attribute …

…in conjunction with the reqd_work_group_size attribute (intel#3170)

There is a rule on FPGA document that the num_simd_work_items attribute we specify must evenly divide
the work-group size we specify for the reqd_work_group_size attribute, was missed during initial
implementation of the num_simd_work_items attribute.

OpenCL spelling for num_simd_work_items attribute supports this rule.
Current implementation of SYCL attribute “num_simd_work_items” and “reqd_work_group_size” does not support this.

This patch

   1. adds support for mutual diagnostic in sema for num_simd_work_items attribute 
        interacting with reqd_work_group_size attribute.
   2. adds tests
   3. updates documentation about this new mutual diagnostic for num_simd_work_items 
       attribute with the note and examples.

Signed-off-by: Soumi Manna <soumi.manna@intel.com>

sycl-nightly/20210218

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[Driver] Pass optimization options to sycl-post-link (intel#3207)

This is one of the patches for moving ESIMD passes from clang FE (BackendUtils.cpp) to sycl-post-link.
This patch is a continuation for intel#3195 and it passes the optimization level to the sycl-post-link.

sycl-nightly/20210217

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[SYCL] Extend USM testing (intel#3189)

Splits sycl/test/extensions/usm.cpp into 2 new test files:
* sycl/test/extensions/usm/usm_alloc_utility.cpp
* sycl/test/extensions/usm/usm_allocator.cpp

The on-device tests have been migrated to the Intel LLVM test suite:
intel/llvm-test-suite#144

Signed-off-by: Steffen Larsen <steffen.larsen@codeplay.com>

sycl-nightly/20210216

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[sycl-post-link] Fixed build with shared libraries (intel#3221)

sycl-nightly/20210215

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[sycl-post-link] Enable ESIMD-specific lowering (intel#3195)

This is the first patch in the effort of moving ESIMD-specific
lowering passes from clang FE (BackendUtils.cpp) to the
sycl-post-link tool after SYCL-ESIMD splitting.

Co-authored-by: kbobrovs <Konstantin.S.Bobrovsky@intel.com>

sycl-nightly/20210214

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[Driver][SYCL][FPGA] Add output report folder when building from AOCR…

… archive (intel#3208)

When building for FPGA and the input is an AOCR archive, the output
report folder was not being added to the offline compilation step.

sycl-nightly/20210213

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[SYCL] Do PI calls tracing in L0 plugin only under SYCL_PI_TRACE=-1 (i…

…ntel#3209)

Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>

sycl-nightly/20210212

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[Doc] Add homepage info on OpenMP project to README file (intel#3117)

Adding information about openmp branch and project. This project is a staging
area for late-outline OpenMP and OMP Offload.

Signed-off-by: Pavel V Chupin <pavel.v.chupin@intel.com>
Co-authored-by: Alexey Bader <alexey.bader@intel.com>
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