| Error floors of LDPC codes on the binary symmetric channel SK Chilappagari, S Sankaranarayanan, B Vasic 2006 IEEE International Conference on Communications 3, 1089-1094, 2006 | 124 | 2006 |
| Low-density parity-check codes for 40-Gb/s optical transmission systems IB Djordjevic, S Sankaranarayanan, SK Chilappagari, B Vasic IEEE Journal of Selected Topics in Quantum Electronics 12 (4), 555-562, 2006 | 90 | 2006 |
| Iterative decoding of linear block codes: A parity-check orthogonalization approach S Sankaranarayanan, B Vasic IEEE Transactions on Information Theory 51 (9), 3347-3353, 2005 | 66 | 2005 |
| Projective-plane iteratively decodable block codes for WDM high-speed long-haul transmission systems IB Djordjevic, S Sankaranarayanan, BV Vasic Journal of Lightwave technology 22 (3), 695-702, 2004 | 65 | 2004 |
| Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory Z Chen, EF Haratsch, S Sankaranarayanan US Patent 9,620,202, 2017 | 61 | 2017 |
| Establishing parameters of subsequent read retry operations based on syndrome weights of prior failed decodings AHS Alhussien, S Sankaranarayanan, EF Haratsch US Patent 10,043,582, 2018 | 43 | 2018 |
| Read retry operations where likelihood value assignments change sign at different read voltages for each read retry AHS Alhussien, S Sankaranarayanan, T Van Nguyen, L Danjean, ... US Patent 9,633,740, 2017 | 43 | 2017 |
| Read retry operations with read reference voltages ranked for different page populations of a memory AHS Alhussien, S Sankaranarayanan, T Van Nguyen, L Danjean, ... US Patent 9,563,502, 2017 | 43 | 2017 |
| Read retry for non-volatile memories AHS Alhussien, EF Haratsch, S Sankaranarayanan, Y Wu US Patent 9,209,835, 2015 | 40 | 2015 |
| Read disturb detection based on dynamic bit error rate estimation AH Alhussien, L Danjean, S Sankaranarayanan, EF Haratsch US Patent 10,482,983, 2019 | 39 | 2019 |
| Failures of the Gallager B decoder: analysis and applications S Sankaranarayanan, SK Chilappagari, R Radhakrishnan, B Vasic Proc. Information Theory and Applications Workshop UCSD 17, 2006 | 39 | 2006 |
| Zone based timing recovery for bit patterned media RC Venkataramani, S Sankaranarayanan, MF Erden US Patent 7,729,074, 2010 | 37 | 2010 |
| Read retry operations with estimation of written data based on syndrome weights AHS Alhussien, S Sankaranarayanan, T Van Nguyen, L Danjean, ... US Patent 10,276,247, 2019 | 34 | 2019 |
| Adaptive read threshold voltage tracking with charge leakage mitigation using charge leakage settling time L Danjean, S Sankaranarayanan, EF Haratsch US Patent 10,388,368, 2019 | 33 | 2019 |
| Independent read threshold voltage tracking for multiple dependent read threshold voltages using syndrome weights AHS Alhussien, S Sankaranarayanan, EF Haratsch US Patent 10,290,358, 2019 | 33 | 2019 |
| Read threshold voltage adaptation using bit error rates based on decoded data S Sankaranarayanan, AHS Alhussien, Z Chen, EF Haratsch US Patent 9,818,488, 2017 | 29 | 2017 |
| Detecting track information from overlapping signals read from a data storage medium S Sankaranarayanan, R Venkataranmani, WM Radich US Patent 9,123,356, 2015 | 28 | 2015 |
| Iteratively decodable codes on m flats for WDM high-speed long-haul transmission S Sankaranarayanan, IB Djordjevic, B Vasic Journal of lightwave technology 23 (11), 3696-3701, 2005 | 27 | 2005 |
| Framework for balancing robustness and latency during collection of statistics from soft reads S Sankaranarayanan, EF Haratsch US Patent 9,645,763, 2017 | 26 | 2017 |
| Adaptive read threshold voltage tracking with bit error rate estimation based on non-linear syndrome weight mapping AHS Alhussien, S Sankaranarayanan, EF Haratsch US Patent 10,180,868, 2019 | 25 | 2019 |
Hakim AlHussienAeonsemi, past positions: Micron, Seagate, LSI, HynixVerified email at umn.edu
