| Frequency-independent equivalent-circuit model for on-chip spiral inductors Y Cao, RA Groves, X Huang, ND Zamdmer, JO Plouchart, RA Wachnik, ... IEEE Journal of solid-state circuits 38 (3), 419-426, 2003 | 546 | 2003 |
| Design of wide-band CMOS VCO for multiband wireless LAN applications NHW Fong, JO Plouchart, N Zamdmer, D Liu, LF Wagner, C Plett, NG Tarr IEEE Journal of Solid-State Circuits 38 (8), 1333-1342, 2003 | 290 | 2003 |
| Record RF performance of 45-nm SOI CMOS technology S Lee, B Jagannathan, S Narasimha, A Chou, N Zamdmer, J Johnson, ... 2007 IEEE International Electron Devices Meeting, 255-258, 2007 | 247 | 2007 |
| Using common mode local oscillator termination in single-ended commutating circuits for conversion gain improvement AVG W Lee, JO Plouchart US Patent App. 10/057,093, 2018 | 208* | 2018 |
| A 1-V 3.8-5.7-GHz wide-band VCO with differentially tuned accumulation MOS varactors for common-mode noise rejection in CMOS SOI technology NHW Fong, JO Plouchart, N Zamdmer, D Liu, LF Wagner, C Plett, NG Tarr IEEE Transactions on Microwave Theory and Techniques 51 (8), 1952-1959, 2003 | 142 | 2003 |
| A 44GHz differentially tuned VCO with 4GHz tuning range in 0.12/spl mu/m SOI CMOS J Kim, JO Plouchart, N Zamdmer, R Trzcinski, K Wu, BJ Gross, M Kim ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State …, 2005 | 128 | 2005 |
| Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications RA Budd, M Meghelli, JS Orcutt, JO Plouchart US Patent 9,786,641, 2017 | 117 | 2017 |
| A linearized, low-phase-noise VCO-based 25-GHz PLL with autonomic biasing B Sadhu, MA Ferriss, AS Natarajan, S Yaldiz, JO Plouchart, AV Rylyakov, ... IEEE Journal of Solid-State Circuits 48 (5), 1138-1150, 2013 | 110 | 2013 |
| A fully-integrated dual-polarization 16-element W-band phased-array transceiver in SiGe BiCMOS A Valdes-Garcia, A Natarajan, D Liu, M Sanduleanu, X Gu, M Ferriss, ... 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 375-378, 2013 | 103 | 2013 |
| Modeling of variation in submicrometer CMOS ULSI technologies SK Springer, S Lee, N Lu, EJ Nowak, JO Plouchart, JS Watts, RQ Williams, ... IEEE Transactions on Electron Devices 53 (9), 2168-2178, 2006 | 100 | 2006 |
| Wafer-scale package structures with integrated antennas D Liu, JO Plouchart, SK Reynolds US Patent 8,648,454, 2014 | 96 | 2014 |
| A 24–30-GHz 256-element dual-polarized 5G phased array using fast on-chip beam calculators and magnetoelectric dipole antennas B Sadhu, A Paidimarri, D Liu, M Yeck, C Ozdag, Y Tojo, W Lee, KX Gu, ... IEEE Journal of Solid-State Circuits 57 (12), 3599-3616, 2022 | 95 | 2022 |
| Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications A Rylyakov, J Tierno, H Ainspan, JO Plouchart, J Bulzacchelli, ZT Deniz, ... 2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009 | 95 | 2009 |
| A fully-monolithic SiGe differential voltage-controlled oscillator for 5 GHz wireless applications JO Plouchart, H Ainspan, M Soyuer, A Ruehli 2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of …, 2000 | 94 | 2000 |
| A 70GHz manufacturable complementary LC-VCO with 6.14 GHz tuning range in 65nm SOI CMOS DD Kim, J Kim, JO Plouchart, C Cho, W Li, D Lim, R Trzcinski, M Kumar, ... 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 88 | 2007 |
| Semiconductor wafer including an integrated waveguide for communicating signals between first and second integrated circuit dies AVG Bing Dang, Duixian Liu, Jean-Olivier Plouchart US Patent App. 10/038,232, 2018 | 87* | 2018 |
| Integration of area efficient antennas for phased array or wafer scale array antenna applications B Dang, D Liu, JO Plouchart, PJ Sorce, CKI Tsang US Patent 9,472,859, 2016 | 80 | 2016 |
| A 0.13-/spl mu/m SOI CMOS technology for low-power digital and RF applications N Zamdmer, A Ray, JO Plouchart, L Wagner, N Fong, KA Jenkins, W Jin, ... 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2001 | 79 | 2001 |
| Passive components in the back end of integrated circuits AK Chinthakindi, DD Coolbaugh, EE Eshun, ZX He, JB Johnson, J Kim, ... US Patent 7,768,055, 2010 | 76 | 2010 |
| Fully integrated 94-GHz dual-polarized TX and RX phased array chipset in SiGe BiCMOS operating up to 105° C W Lee, JO Plouchart, C Ozdag, Y Aydogan, M Yeck, A Cabuk, A Kepkep, ... IEEE Journal of Solid-State Circuits 53 (9), 2512-2531, 2018 | 75 | 2018 |
Alberto Valdes-Garcia. Fellow, IEEEResearcher and Manager at IBM ReseachVerified email at us.ibm.com
