| Understanding PCIe performance for end host networking R Neugebauer, G Antichi, JF Zazo, Y Audzevich, S López-Buedo, ... Proceedings of the 2018 Conference of the ACM Special Interest Group on Data …, 2018 | 413 | 2018 |
| Dynamically inserting, operating, and eliminating thermal sensors of FPGA-based systems S Lopez-Buedo, J Garrido, EI Boemo IEEE Transactions on components and packaging technologies 25 (4), 561-566, 2003 | 136 | 2003 |
| Rack-scale disaggregated cloud data centers: The dReDBox project vision K Katrinis, D Syrivelis, D Pnevmatikatos, G Zervas, D Theodoropoulos, ... 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 690-695, 2016 | 135 | 2016 |
| Thermal monitoring on FPGAs using ring-oscillators E Boemo, S López-Buedo International Workshop on Field Programmable Logic and Applications, 69-78, 1997 | 106 | 1997 |
| Thermal testing on reconfigurable computers S López-Buedo, J Garrido, E Boemo IEEE Design & Test of Computers 17 (1), 84-91, 2000 | 103 | 2000 |
| Limago: An FPGA-based open-source 100 GbE TCP/IP stack M Ruiz, D Sidler, G Sutter, G Alonso, S López-Buedo 2019 29th International Conference on Field Programmable Logic and …, 2019 | 98 | 2019 |
| RNS-enabled digital signal processor design J Ramırez, A Garcı́a, S Lopez-Buedo, A Lloris Electronics Letters 38 (6), 266-268, 2002 | 90 | 2002 |
| Virtual embedded blocks: A methodology for evaluating embedded elements in FPGAs CH Ho, PHW Leong, W Luk, SJE Wilton, S López-Buedo 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing …, 2006 | 74 | 2006 |
| Low-power FSMs in FPGA: Encoding alternatives G Sutter, E Todorovich, S López-Buedo, E Boemo International Workshop on Power and Timing Modeling, Optimization and …, 2002 | 62 | 2002 |
| Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report S Lopez-Buedo, E Boemo Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004 | 58 | 2004 |
| dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter M Bielski, I Syrigos, K Katrinis, D Syrivelis, A Reale, D Theodoropoulos, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 56 | 2018 |
| Some notes on power management on FPGA-based systems EI Boemo, GG de Rivera, S López-Buedo, JM Meneses International Workshop on Field Programmable Logic and Applications, 149-157, 1995 | 49 | 1995 |
| Self-reconfigurable embedded systems on low-cost FPGAs I Gonzalez, E Aguayo, S Lopez-Buedo IEEE Micro 27 (4), 49-57, 2007 | 45 | 2007 |
| Using partial reconfiguration in cryptographic applications: an implementation of the IDEA algorithm I Gonzalez, S Lopez-Buedo, FJ Gomez, J Martinez International Conference on Field Programmable Logic and Applications, 194-203, 2003 | 39 | 2003 |
| Characterization of the busy-hour traffic of IP networks based on their intrinsic features JL García-Dorado, JA Hernández, J Aracil, JEL de Vergara, ... Computer Networks 55 (9), 2111-2125, 2011 | 36 | 2011 |
| A PCIe DMA engine to support the virtualization of 40 Gbps FPGA-accelerated network appliances JF Zazo, S Lopez-Buedo, Y Audzevich, AW Moore 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 35 | 2015 |
| Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture I Gonzalez, S Lopez-Buedo, G Sutter, D Sanchez-Roman, ... Journal of Systems Architecture 58 (6-7), 247-256, 2012 | 35 | 2012 |
| Some experiments about wave pipelining on FPGA's EI Boemo, S López-Buedo, JM Meneses IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (2), 232-237, 2002 | 33 | 2002 |
| Demonstration of latency-aware 5G network slicing on optical metro networks B Shariati, L Velasco, JJ Pedreno-Manresa, A Dochhan, R Casellas, ... Journal of Optical Communications and Networking 14 (1), A81-A90, 2021 | 32 | 2021 |
| Simulation-based approach for evaluating on-chip interconnect architectures S Suboh, M Bakhouya, S Lopez-Buedo, T El-Ghazawi 2008 4th Southern Conference on Programmable Logic, 75-80, 2008 | 27 | 2008 |
