| A 3.1 mW 8b 1.2 GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32 nm digital SOI CMOS L Kull, T Toifl, M Schmatz, PA Francese, C Menolfi, M Braendli, M Kossel, ... IEEE Journal of Solid-State Circuits 48 (12), 3049-3058, 2013 | 462 | 2013 |
| A 28-Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32-nm SOI CMOS technology JF Bulzacchelli, C Menolfi, TJ Beukema, DW Storaska, J Hertle, ... IEEE Journal of Solid-State Circuits 47 (12), 3232-3248, 2012 | 250 | 2012 |
| 22.1 a 90gs/s 8b 667mw 64× interleaved sar adc in 32nm digital soi cmos L Kull, T Toifl, M Schmatz, PA Francese, C Menolfi, M Braendli, M Kossel, ... 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 247 | 2014 |
| A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With 16 dB Return Loss Over 10 GHz Bandwidth M Kossel, C Menolfi, J Weiss, P Buchmann, G Von Bueren, L Rodoni, ... IEEE Journal of Solid-State Circuits 43 (12), 2905-2920, 2008 | 202 | 2008 |
| A 24–72-GS/s 8-b time-interleaved SAR ADC with 2.0–3.3-pJ/conversion and> 30 dB SNDR at Nyquist in 14-nm CMOS FinFET L Kull, D Luu, C Menolfi, M Braendli, PA Francese, T Morf, M Kossel, ... IEEE Journal of Solid-State Circuits 53 (12), 3508-3516, 2018 | 167 | 2018 |
| An active tagging system using circular-polarization modulation MA Kossel, R Kung, H Benedickter, W Biichtokd IEEE Transactions on Microwave Theory and Techniques 47 (12), 2242-2248, 1999 | 143 | 1999 |
| A 22-Gb/s PAM-4 receiver in 90-nm CMOS SOI technology T Toifl, C Menolfi, M Ruegg, R Reutemann, P Buchmann, M Kossel, ... IEEE Journal of Solid-State Circuits 41 (4), 954-965, 2006 | 140 | 2006 |
| 28.5 A 10b 1.5 GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET L Kull, D Luu, C Menolfi, M Braendli, PA Francese, T Morf, M Kossel, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 474-475, 2017 | 118 | 2017 |
| High-density optical interconnects within large-scale systems C Berger, MA Kossel, C Menolfi, T Morf, T Toifl, ML Schmatz VCSELs and Optical Interconnects 4942, 222-235, 2003 | 114 | 2003 |
| A 16Gb/s source-series terminated transmitter in 65nm CMOS SOI C Menolfi, T Toifl, P Buchmann, M Kossel, T Morf, J Weiss, M Schmatz 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 112 | 2007 |
| Implementation of low-power 6–8 b 30–90 GS/s time-interleaved ADCs with optimized input bandwidth in 32 nm CMOS L Kull, J Pliva, T Toifl, M Schmatz, PA Francese, C Menolfi, M Braendli, ... IEEE Journal of Solid-State Circuits 51 (3), 636-648, 2016 | 110 | 2016 |
| A 4.6W/mm2power density 86% efficiency on-chip switched capacitor DC-DC converter in 32 nm SOI CMOS TM Andersen, F Krismer, JW Kolar, T Toifl, C Menolfi, L Kull, T Morf, ... 2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and …, 2013 | 104 | 2013 |
| A sub-ns response on-chip switched-capacitor DC-DC voltage regulator delivering 3.7 W/mm2 at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS TM Andersen, F Krismer, JW Kolar, T Toifl, C Menolfi, L Kull, T Morf, ... IEEE International Solid-State Circuits Conference, 2014 | 99 | 2014 |
| A 64-Gb/s 1.4-pJ/b NRZ optical receiver data-path in 14-nm CMOS FinFET I Ozkaya, A Cevrero, PA Francese, C Menolfi, T Morf, M Brändli, ... IEEE Journal of Solid-State Circuits 52 (12), 3458-3473, 2017 | 96 | 2017 |
| 30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology F Ellinger, LC Rodoni, G Sialm, C Kromer, G von Buren, ML Schmatz, ... IEEE transactions on microwave theory and techniques 52 (5), 1382-1391, 2004 | 95 | 2004 |
| A 112gb/s 2.6 pj/b 8-tap ffe pam-4 sst tx in 14nm cmos C Menolfi, M Braendli, PA Francese, T Morf, A Cevrero, M Kossel, L Kull, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 104-106, 2018 | 93 | 2018 |
| A 2.6 mW/Gbps 12.5 Gbps RX with 8-tap switched-capacitor DFE in 32 nm CMOS T Toifl, C Menolfi, M Ruegg, R Reutemann, D Dreps, T Beukema, A Prati, ... IEEE Journal of Solid-State Circuits 47 (4), 897-910, 2012 | 89 | 2012 |
| A 0.94-ps-RMS-jitter 0.016-mm/sup 2/2.5-GHz multiphase generator PLL with 360/spl deg/digitally programmable phase shift for 10-Gb/s serial links T Toifl, C Menolfi, P Buchmann, M Kossel, T Morf, R Reutemann, ... IEEE journal of solid-state circuits 40 (12), 2700-2712, 2005 | 88 | 2005 |
| 6.1 A 100Gb/s 1.1 pJ/b PAM-4 RX with dual-mode 1-tap PAM-4/3-tap NRZ speculative DFE in 14nm CMOS FinFET A Cevrero, I Ozkaya, PA Francese, M Brandli, C Menolfi, T Morf, M Kossel, ... 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 112-114, 2019 | 83 | 2019 |
| A 161-mW 56-Gb/s ADC-based discrete multitone wireline receiver data-path in 14-nm FinFET G Kim, L Kull, D Luu, M Braendli, C Menolfi, PA Francese, H Yueksel, ... IEEE Journal of Solid-State Circuits 55 (1), 38-48, 2019 | 81 | 2019 |
