| A reliable 8T SRAM for high-speed searching and logic-in-memory operations J Chen, W Zhao, Y Wang, Y Shu, W Jiang, Y Ha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (6), 769-780, 2022 | 61 | 2022 |
| A High-Throughput Full-Dataflow MobileNetv2 Accelerator on Edge FPGA J Weixiong, Y Heng, H Yajun IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022 | 42 | 2022 |
| Efficient fpga implementation of k-nearest-neighbor search algorithm for 3d lidar localization and mapping in smart vehicles H Sun, X Liu, Q Deng, W Jiang, S Luo, Y Ha IEEE Transactions on Circuits and Systems II: Express Briefs 67 (9), 1644-1648, 2020 | 35 | 2020 |
| WSQ-AdderNet: Efficient weight standardization based quantized AdderNet FPGA accelerator design with high-density INT8 DSP-LUT co-packing optimization Y Zhang, B Sun, W Jiang, Y Ha, M Hu, W Zhao Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 31 | 2022 |
| A 55nm, 0.4 V 5526-TOPS/W compute-in-memory binarized CNN accelerator for AIoT applications H Zhang, Y Shu, W Jiang, Z Yin, W Zhao, Y Ha IEEE Transactions on Circuits and Systems II: Express Briefs 68 (5), 1695-1699, 2021 | 30 | 2021 |
| Optimizing energy efficiency of CNN-based object detection with dynamic voltage and frequency scaling W Jiang, H Yu, J Zhang, J Wu, S Luo, Y Ha Journal of Semiconductors 41 (2), 022406, 2020 | 21 | 2020 |
| Tait: One-shot full-integer lightweight dnn quantization via tunable activation imbalance transfer W Jiang, H Yu, X Liu, H Sun, R Li, Y Ha 2021 58th ACM/IEEE Design Automation Conference (DAC), 1027-1032, 2021 | 14 | 2021 |
| FODM: A framework for accurate online delay measurement supporting all timing paths in FPGA W Jiang, H Yu, H Zhang, Y Shu, R Li, J Chen, Y Ha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (4), 502-514, 2022 | 12 | 2022 |
| Fidrl: Flexible invocation-based deep reinforcement learning for dvfs scheduling in embedded systems J Li, W Jiang, Y He, Q Yang, A Gao, Y Ha, E Özcan, R Bai, T Cui, H Yu IEEE Transactions on Computers, 2024 | 11 | 2024 |
| Quality optimization of adaptive applications via deep reinforcement learning in energy harvesting edge devices F Chen, H Yu, W Jiang, Y Ha IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 11 | 2022 |
| DVFS-based scrubbing scheduling for reliability maximization on parallel tasks in SRAM-based FPGAs R Li, H Yu, W Jiang, Y Ha 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 11 | 2020 |
| Aos: An automated overclocking system for high-performance cnn accelerator through timing delay measurement on fpga W Jiang, H Yu, F Chen, Y Ha IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 10 | 2023 |
| Energy efficiency optimization of FPGA-based CNN accelerators with full data reuse and VFS W Jiang, H Yu, X Liu, Y Ha 2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019 | 8 | 2019 |
| Refscat: Formal verification of logic-optimized multipliers via automated reference multiplier generation and sca-sat synergy R Li, L Li, H Yu, M Fujita, W Jiang, Y Ha IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 6 | 2024 |
| An accurate FPGA online delay monitor supporting all timing paths W Jiang, R Li, H Yu, Y Ha 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 4 | 2020 |
| Enabling fine-grained dynamic voltage and frequency scaling in SDSoC W Jiang, H Yu, Y Ha 2019 32nd IEEE International System-on-Chip Conference (SOCC), 56-61, 2019 | 4 | 2019 |
| A Deep Investigation on Stealthy DVFS Fault Injection Attacks at DNN Hardware Accelerators J Xu, F Zhang, W Jin, K Yang, Z Wang, W Jiang, Y Ha IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 3 | 2024 |
| QuantTPM: Efficient Mixed-Precision Quantization Framework for Tractable Probabilistic Models S Zhang, B Ning, G Yan, X Liu, W Jiang, Y Ha IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025 | 2 | 2025 |
| Automatic overclocking controller based on circuit delay measurement W JIANG, Y Ha US Patent 12,181,911, 2024 | 1 | 2024 |
| An Energy-Efficient and Real-Time FPGA-Based Point Cloud Registration Framework with Ultra-Fast and Configurable Multi-Mode Correspondence Search Q Deng, H Sun, Y Shu, J Xiao, W Jiang, H Wang, Y Ha ACM Transactions on Reconfigurable Technology and Systems 18 (4), 1-30, 2025 | | 2025 |
