| All-inkjet-printed thin-film transistors: manufacturing process reliability by root cause analysis E Sowade, E Ramon, KY Mitra, C Martínez-Domingo, M Pedró, J Pallarès, ... Scientific reports 6 (1), 33490, 2016 | 127 | 2016 |
| A 25-µw all-mos potentiostatic delta-sigma adc for smart electrochemical sensors S Sutula, JP Cuxart, J Gonzalo-Ruiz, FX Muñoz-Pascual, L Terés, ... IEEE Transactions on circuits and systems I: Regular Papers 61 (3), 671-679, 2014 | 49 | 2014 |
| Large-area automated layout extraction methodology for full-ic reverse engineering R Quijada, R Dura, J Pallares, X Formatje, S Hidalgo, F Serra-Graells Journal of Hardware and Systems Security 2 (4), 322-332, 2018 | 38 | 2018 |
| Development of a standard cell library and ASPEC design flow for organic thin film transistor technology M Mashayekhi, M Llamas, J Carrabina, J Pallarès, F Vila, L Terés Design of Circuits and Integrated Systems, 1-6, 2014 | 16 | 2014 |
| Inkjet-configurable gate arrays (IGA) J Carrabina, M Mashayekhi, J Pallares, L Teres IEEE Transactions on Emerging Topics in Computing 5 (2), 238-246, 2016 | 13 | 2016 |
| A systematic study of pattern compensation methods for all-inkjet printing processes F Vila, J Pallares, E Ramon, L Teres IEEE Transactions on Components, Packaging and Manufacturing Technology 6 (4 …, 2016 | 13 | 2016 |
| Micro-electromechanical switch, method of manufacturing an integrated circuit including at least one such switch, and an integrated circuit J Cuxart US Patent App. 11/582,948, 2007 | 9 | 2007 |
| An academic EDA suite for the full-custom design of mixed-mode integrated circuits J Pallarès, K Sabine, L Terés, F Serra-Graells 2017 IEEE international symposium on circuits and systems (ISCAS), 1-4, 2017 | 8 | 2017 |
| PCell based devices & structures for Printed Electronics and related semiautomatic characterization loop A Conde, J Pallarès, L Terés, C Martínez, E Ramon, J Carrabina Proceedings of the XVIII Conference on the Design of Circuits and Integrated …, 2013 | 8 | 2013 |
| fast and robust Topology-Based logic gate identification for automated IC reverse engineering R Durà, J Pallarès, R Quijada, X Formatjé, S Hidalgo, F Serra-Graells International Symposium for Testing and Failure Analysis 81504, 299-302, 2017 | 7 | 2017 |
| Top-down design flow for application specific printed electronics circuits (ASPECs) M Llamas, M Mashayekhi, J Carrabina, J Pallares, F Vila, L Teres Design of Circuits and Integrated Systems, 1-5, 2014 | 7 | 2014 |
| A 1.2 V 130μA 10-bit MOS-Only Log-Domain ΣΔ Modulator X Redondo, J Pallares, F Serra-Graells 2007 IEEE International Symposium on Circuits and Systems (ISCAS), 17-20, 2007 | 7 | 2007 |
| Fault-tolerant inkjet gate array for application specific printed electronic circuits M Mashayekhi, M Llamas, J Pallares, F Vila, L Teres, J Carrabina 6th International Conference on Computer Aided Design for Thin-Film …, 2014 | 5 | 2014 |
| Teaching mixed-mode full-custom VLSI design with gaf, SpiceOpus and Glade S Sutula, F Vila, J Pallarès, K Sabine, L Terés, F Serra-Graells 10th European Workshop on Microelectronics Education (EWME), 43-48, 2014 | 5 | 2014 |
| Microswitch with a first actuated portion and a second contact portion M Carmona, J Pallares US Patent 7,745,747, 2010 | 5 | 2010 |
| Large-scale fabrication of all-inkjet printed organic thin film transistors: A quantitative study E Ramon, C Martínez-Domingo, A Alcalde-Aragonés, J Carrabina, ... NIP & Digital Fabrication Conference 30, 455-460, 2014 | 4 | 2014 |
| Electrostatic actuation method and electrostatic actuator with integral electrodes for microelectromechanical systems M Flores, J Cuxart US Patent App. 11/717,803, 2007 | 4 | 2007 |
| A fully-automated methodology and system for printed electronics foil characterization F Vila, J Pallarès, A Conde, L Terés Proceedings of the 2015 International Conference on Microelectronic Test …, 2015 | 3 | 2015 |
| Development of digital application specific printed electronics circuits: from specification to final prototypes M Llamas, M Mashayekhi, A Alcalde, J Carrabina, J Pallarès, F Vila, ... Journal of Display Technology 11 (8), 652-657, 2015 | 3 | 2015 |
| MODELING ALL-MOS LOG FILTERS AND ITS APPLICATION TO SIGMA-DELTA MODULATORS J Pallares, J Sabadell, F Serra-Graells IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, I-117, 2003 | 3 | 2003 |
