| Reversible-logic design with online testability DP Vasudevan, PK Lala, J Di, JP Parkerson IEEE transactions on instrumentation and measurement 55 (2), 406-414, 2006 | 211 | 2006 |
| A 6.45 Self-Powered SoC With Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems A Roy, A Klinefelter, FB Yahya, X Chen, LP Gonzalez-Guerrero, CJ Lukas, ... IEEE Transactions on biomedical circuits and systems 9 (6), 862-874, 2015 | 115 | 2015 |
| Self-checking carry-select adder design based on two-rail encoding DP Vasudevan, PK Lala, JP Parkerson IEEE Transactions on Circuits and Systems I: Regular Papers 54 (12), 2696-2705, 2007 | 112 | 2007 |
| Online testable reversible logic circuit design using NAND blocks DP Vasudevan, PK Lala, JP Parkerson 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2004 | 57 | 2004 |
| A computational temporal logic for superconducting accelerators G Tzimpragos, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 54 | 2020 |
| Manipulating chiral spin transport with ferroelectric polarization X Huang, X Chen, Y Li, J Mangeri, H Zhang, M Ramesh, H Taghinejad, ... Nature materials 23 (7), 898-904, 2024 | 53 | 2024 |
| Boosted race trees for low energy classification G Tzimpragos, A Madhavan, D Vasudevan, D Strukov, T Sherwood Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 44 | 2019 |
| A novel approach for on-line testable reversible logic circuit design DP Vasudevan, PK Lala, JP Parkerson 13th Asian Test Symposium, 325-330, 2004 | 36 | 2004 |
| Global built-in self-repair for 3D memories with redundancy sharing and parallel testing X Wang, D Vasudevan, HHS Lee 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE …, 2012 | 32 | 2012 |
| A technique for modular design of self-checking carry-select adder DP Vasudevan, PK Lala 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2005 | 29 | 2005 |
| CMOS realization of online testable reversible logic gates DP Vasudevan, PK Lala, JP Parkerson IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design …, 2005 | 28 | 2005 |
| Temporal computing with superconductors G Tzimpragos, J Volk, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... IEEE Micro 41 (3), 71-79, 2021 | 21 | 2021 |
| 10x10: A case study in highly-programmable and energy-efficient heterogeneous federated architecture AA Chien, T Thanh-Hoang, D Vasudevan, Y Fang, A Shambayati ACM SIGARCH Computer Architecture News 43 (3), 2-9, 2015 | 13 | 2015 |
| Design and analysis of a novel 8T SRAM cell for adiabatic and non-adiabatic operations J Chen, D Vasudevan, E Popovici, M Schellekens, P Gillen 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 13 | 2010 |
| Generalized pattern matching micro-engine Y Fang, R ur Rasool, D Vasudevan, AA Chien 4th Workshop on Architectures and Systems for Big Data (ASBD) held with ISCA 14, 2014 | 12 | 2014 |
| SRNoC: A statically-scheduled circuit-switched superconducting race logic NoC G Michelogiannakis, D Lyles, P Gonzalez-Guerrero, M Bautista, ... 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2021 | 9 | 2021 |
| Superconducting-oscillatory neural network with pixel error detection for image recognition R Cheng, C Kirst, D Vasudevan IEEE Transactions on Applied Superconductivity 33 (5), 1-7, 2023 | 7 | 2023 |
| 3D photonics as enabling technology for deep 3D DRAM stacking S Werner, P Fotouhi, X Xiao, M Fariborz, SJB Yoo, G Michelogiannakis, ... Proceedings of the International Symposium on Memory Systems, 206-221, 2019 | 7 | 2019 |
| Design of a low power, sub-threshold, asynchronous arithmetic logic unit using a bidirectional adder J Chen, D Vasudevan, E Popovici, M Schellekens 2011 14th Euromicro Conference on Digital System Design, 301-308, 2011 | 7 | 2011 |
| In-sensor classification with boosted race trees G Tzimpragos, A Madhavan, D Vasudevan, D Strukov, T Sherwood Communications of the ACM 64 (6), 99-105, 2021 | 6 | 2021 |
George MichelogiannakisLawrence Berkeley National LaboratoryVerified email at lbl.gov
