| Bandwidth-constrained mapping of cores onto NoC architectures S Murali, G De Micheli Proceedings design, automation and test in Europe conference and exhibition …, 2004 | 967 | 2004 |
| NoC synthesis flow for customized domain specific multiprocessor systems-on-chip D Bertozzi, A Jalabert, S Murali, R Tamhankar, S Stergiou, L Benini, ... IEEE transactions on parallel and distributed systems 16 (2), 113-129, 2005 | 771 | 2005 |
| Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005 | 450 | 2005 |
| SUNMAP: a tool for automatic topology selection and generation for NoCs S Murali, G De Micheli Proceedings of the 41st annual Design Automation Conference, 914-919, 2004 | 430 | 2004 |
| /spl times/pipesCompiler: a tool for instantiating application specific networks on chip A Jalabert, S Murali, L Benini, G De Micheli Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 388 | 2004 |
| Networks on chips L Benini, G De Micheli, D Bertozzi, I Cidon, K Goossens, K Kim, K Lee, ... Elsevier Inc., 2006 | 351 | 2006 |
| Designing application-specific networks on chips with floorplan information S Murali, P Meloni, F Angiolini, D Atienza, S Carta, L Benini, G De Micheli, ... Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 266 | 2006 |
| Network-on-chip design and synthesis outlook D Atienza, F Angiolini, S Murali, A Pullini, L Benini, G De Micheli Integration 41 (3), 340-359, 2008 | 219 | 2008 |
| A methodology for mapping multiple use-cases onto networks on chips S Murali, M Coenen, A Radulescu, K Goossens, G De Micheli Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 217 | 2006 |
| Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees S Murali, L Benini, G De Micheli Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 192 | 2005 |
| SunFloor 3D: A tool for networks on chip topology synthesis for 3-D systems on chips C Seiculescu, S Murali, L Benini, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 174 | 2010 |
| Online obstructive sleep apnea detection on medical wearable sensors G Surrel, A Aminifar, F Rincón, S Murali, D Atienza IEEE transactions on biomedical circuits and systems 12 (4), 762-773, 2018 | 172 | 2018 |
| Temperature-aware processor frequency assignment for mpsocs using convex optimization S Murali, A Mutapcic, D Atienza, R Gupta, S Boyd, G De Micheli Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007 | 165 | 2007 |
| Temperature control of high-performance multi-core platforms using convex optimization S Murali, A Mutapcic, D Atienza, R Gupta, S Boyd, L Benini, G De Micheli Proceedings of the conference on Design, automation and test in Europe, 110-115, 2008 | 140 | 2008 |
| Synthesis of networks on chips for 3D systems on chips S Murali, C Seiculescu, L Benini, G De Micheli 2009 Asia and South Pacific Design Automation Conference, 242-247, 2009 | 130 | 2009 |
| Mapping and configuration methods for multi-use-case networks on chips S Murali, M Coenen, A Radulescu, K Goossens, G De Micheli Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 128 | 2006 |
| Method to design network-on-chip (NOC)-based communication systems S Murali, L Benini, G De Micheli US Patent 8,042,087, 2011 | 116 | 2011 |
| A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip S Murali, D Atienza, L Benini, G De Michel Proceedings of the 43rd annual Design Automation Conference, 845-848, 2006 | 115 | 2006 |
| A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control M Coenen, S Murali, A Ruadulescu, K Goossens, G De Micheli Proceedings of the 4th international conference on Hardware/software …, 2006 | 110 | 2006 |
| Networks on chips: From research to products G De Micheli, C Seiculescu, S Murali, L Benini, F Angiolini, A Pullini Proceedings of the 47th Design Automation Conference, 300-305, 2010 | 104 | 2010 |
