| An image encryption method based on chaos system and AES algorithm. A Arab, MJ Rostami, B Ghavami Journal of Supercomputing 75 (10), 2019 | 254 | 2019 |
| A survey on fault injection methods of digital integrated circuits M Eslami, B Ghavami, M Raji, A Mahani Integration 71, 154-163, 2020 | 79 | 2020 |
| An image encryption algorithm using the combination of chaotic maps AA Arab, MJB Rostami, B Ghavami Optik 261, 169122, 2022 | 48 | 2022 |
| Aadam: a fast, accurate, and versatile aging-aware cell library delay model using feed-forward neural network SM Ebrahimipour, B Ghavami, H Mousavi, M Raji, Z Fang, L Shannon Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 39 | 2020 |
| HVD: horizontal-vertical-diagonal error detecting and correcting code to protect against with soft errors M Kishani, HR Zarandi, H Pedram, A Tajary, M Raji, B Ghavami Design Automation for Embedded Systems 15 (3), 289-310, 2011 | 39 | 2011 |
| FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions B Ghavami, M Sadati, Z Fang, L Shannon Design, Automation and Test in Europe Conference (DATE 2022), 2022 | 37 | 2022 |
| Soft Error Rate Reduction of Combinational Circuits Using Gate Sizing in the Presence of Process Variations M Raji, B Ghavami IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016 | 27 | 2016 |
| Improving Combinational Circuit Reliability Against Multiple Event Transients via a Partition and Restructuring Approach MR Rohanipoor, B Ghavami, M Raji IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 24 | 2020 |
| Soft error reliability improvement of digital circuits by exploiting a fast gate sizing scheme M Raji, MA Sabet, B Ghavami IEEE Access 7, 66485-66495, 2019 | 22 | 2019 |
| Using a privacy-enhanced authentication process to secure IoT-based smart grid infrastructures. S Rostampour, N Bagheri, B Ghavami, Y Bendavid, S Kumari, H Martin, ... Journal of Supercomputing 80 (2), 2024 | 21 | 2024 |
| Soft error rate estimation of combinational circuits based on vulnerability analysis M Raji, H Pedram, B Ghavami IET Computers & Digital Techniques 9 (6), 311-320, 2015 | 21 | 2015 |
| Timing reliability improvement of master-slave flip-flops in the presence of aging effects A Jafari, M Raji, B Ghavami IEEE Transactions on Circuits and Systems I: Regular Papers 67 (12), 4761-4773, 2020 | 20 | 2020 |
| An EDA tool for implementation of low power and secure crypto-chips B Ghavami, H Pedram, M Najibi Computers & Electrical Engineering 35 (2), 244-257, 2009 | 19 | 2009 |
| A smart adaptive particle swarm optimization–support vector machine: android botnet detection application: M. Moodi et al. M Moodi, M Ghazvini, H Moodi, B Ghavami The Journal of Supercomputing 76 (12), 9854-9881, 2020 | 18 | 2020 |
| Impacts of process variations and aging on lifetime reliability of flip-flops: A comparative analysis A Jafari, M Raji, B Ghavami IEEE Transactions on Device and Materials Reliability 19 (3), 551-562, 2019 | 18 | 2019 |
| High performance asynchronous design flow using a novel static performance analysis method B Ghavami, H Pedram Computers & Electrical Engineering 35 (6), 920-941, 2009 | 18 | 2009 |
| A scalable solution to soft error tolerant circuit design using partitioning-based gate sizing MA Sabet, B Ghavami, M Raji IEEE Transactions on Reliability 66 (1), 245-256, 2017 | 17 | 2017 |
| Quantizing YOLOv7: A Comprehensive Study M Baghbanbashi, M Raji, B Ghavami 2023 28th International Computer Conference, Computer Society of Iran (CSICC …, 2023 | 16 | 2023 |
| A statistical gate sizing method for timing yield and lifetime reliability optimization of integrated circuits SM Ebrahimipour, B Ghavami, M Raji IEEE Transactions on Emerging Topics in Computing 9 (2), 759-773, 2020 | 16 | 2020 |
| Statistical functional yield estimation and enhancement of CNFET-based VLSI circuits B Ghavami, M Raji, H Pedram, M Pedram IEEE transactions on very large scale integration (VLSI) systems 21 (5), 887-900, 2012 | 16 | 2012 |
Mohsen RajiAssociate Professor, School of Electrical & Computer Engineering, Shiraz UniversityVerified email at shirazu.ac.ir
