| A first step toward cost functions for quantum-dot cellular automata designs W Liu, L Lu, M O’Neill, EE Swartzlander IEEE Transactions on Nanotechnology 13 (3), 476-487, 2014 | 263 | 2014 |
| High performance single-chip FPGA Rijndael algorithm implementations M McLoone, JV McCanny International Workshop on Cryptographic Hardware and Embedded Systems, 65-76, 2001 | 247 | 2001 |
| Modified Montgomery modular multiplication and RSA exponentiation techniques C McIvor, M McLoone, JV McCanny IEE Proceedings-Computers and Digital Techniques 151 (6), 402-408, 2004 | 223 | 2004 |
| Rijndael FPGA implementations utilising look-up tables M McLoone, JV McCanny Journal of VLSI signal processing systems for signal, image and video …, 2003 | 216 | 2003 |
| Fast Montgomery modular multiplication and RSA cryptographic processor architectures C Mclvor, M McLoone, JV McCanny The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003 …, 2003 | 207 | 2003 |
| Neural network based attack on a masked implementation of AES R Gilmore, N Hanley, M O'Neill 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 189 | 2015 |
| Hardware Elliptic Curve Cryptographic Processor Over CJ McIvor, M McLoone, JV McCanny IEEE Transactions on Circuits and Systems I: Regular Papers 53 (9), 1946-1957, 2006 | 187 | 2006 |
| Optimized schoolbook polynomial multiplication for compact lattice-based cryptography on FPGA W Liu, S Fan, A Khalid, C Rafferty, M O’Neill IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (10 …, 2019 | 158 | 2019 |
| Ten years of hardware Trojans: a survey from the attacker's perspective M Xue, C Gu, W Liu, S Yu, M O'Neill IET Computers & Digital Techniques 14 (6), 231-246, 2020 | 154 | 2020 |
| FPGA implementations of the round two SHA-3 candidates B Baldwin, A Byrne, L Lu, M Hamilton, N Hanley, M O'Neill, WP Marnane 2010 International Conference on Field Programmable Logic and Applications …, 2010 | 135 | 2010 |
| Practical homomorphic encryption: A survey C Moore, M O'Neill, E O'Sullivan, Y Doröz, B Sunar 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2792-2795, 2014 | 129 | 2014 |
| Are QCA cryptographic circuits resistant to power analysis attack? W Liu, S Srivastava, L Lu, M O'Neill, EE Swartzlander IEEE transactions on nanotechnology 11 (6), 1239-1251, 2012 | 127 | 2012 |
| Design rules for quantum-dot cellular automata W Liu, L Lu, M O'Neill, EE Swartzlander 2011 ieee international symposium of circuits and systems (iscas), 2361-2364, 2011 | 127 | 2011 |
| On practical discrete Gaussian samplers for lattice-based cryptography J Howe, A Khalid, C Rafferty, F Regazzoni, M O’Neill IEEE Transactions on Computers 67 (3), 322-334, 2016 | 120 | 2016 |
| Insecurity by design: Today's IoT device security problem M O’Neill Engineering 2 (1), 48-49, 2016 | 118 | 2016 |
| Hardware comparison of the ISO/IEC 29192-2 block ciphers N Hanley, M ONeill 2012 IEEE computer society annual symposium on VLSI, 57-62, 2012 | 118 | 2012 |
| Design and analysis of majority logic-based approximate adders and multipliers W Liu, T Zhang, E McLarnon, M O’Neill, P Montuschi, F Lombardi IEEE Transactions on Emerging Topics in Computing 9 (3), 1609-1624, 2019 | 105 | 2019 |
| QCA systolic array design L Lu, W Liu, M O'Neill, EE Swartzlander IEEE Transactions on computers 62 (3), 548-560, 2011 | 103 | 2011 |
| A flip-flop based arbiter physical unclonable function (APUF) design with high entropy and uniqueness for FPGA implementation C Gu, W Liu, Y Cui, N Hanley, MÁ O’Neill, F Lombardi IEEE Transactions on Emerging Topics in Computing 9 (4), 1853-1866, 2019 | 95 | 2019 |
| High-performance FPGA implementation of DES using a novel method for implementing the key schedule M McLoone, JV McCanny IEE Proceedings-Circuits, Devices and Systems 150 (5), 373-378, 2003 | 95 | 2003 |
Weiqiang LiuProfessor, Nanjing University of Aeronautics and AstronauticsVerified email at nuaa.edu.cn
