[go: up one dir, main page]

Follow
Deshanand Singh
Deshanand Singh
Untether.ai
Verified email at untether.ai
Title
Cited by
Cited by
Year
From OpenCL to high-performance hardware on FPGAs
TS Czajkowski, U Aydonat, D Denisenko, J Freeman, M Kinsner, D Neto, ...
22nd international conference on field programmable logic and applications …, 2012
3212012
Gzip on a chip: High performance lossless data compression on fpgas using opencl
MS Abdelfattah, A Hagiescu, D Singh
Proceedings of the international workshop on openCL 2013 & 2014, 1-9, 2014
1542014
Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms
D Chen, D Singh
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 297-304, 2013
1092013
FPGA technology mapping: A study of optimality
A Ling, DP Singh, SD Brown
Proceedings of the 42nd annual Design Automation Conference, 427-432, 2005
1042005
Integrated retiming and placement for field programmable gate arrays
DP Singh, SD Brown
Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002
882002
Using OpenCL to evaluate the efficiency of CPUs, GPUs and FPGAs for information filtering
D Chen, D Singh
22nd International Conference on Field Programmable Logic and Applications …, 2012
692012
The case for registered routing switches in field programmable gate arrays
DP Singh, SD Brown
Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field …, 2001
692001
Implementing FPGA design with the OpenCL standard
D Singh
Altera whitepaper 1, 2011
612011
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
D Chen, D Singh, J Chromczak, D Lewis, R Fung, D Neto, V Betz
Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010
492010
Incremental retiming for FPGA physical synthesis
DP Singh, V Manohararajah, SD Brown
Proceedings of the 42nd annual Design Automation Conference, 433-438, 2005
492005
FPGA logic synthesis using quantified boolean satisfiability
A Ling, DP Singh, SD Brown
International Conference on Theory and Applications of Satisfiability …, 2005
462005
Incremental placement for layout driven optimizations on FPGAs
DP Singh, SD Brown
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002
462002
OpenCL for FPGAs: Prototyping a compiler
TS Czajkowski, D Neto, M Kinsner, U Aydonat, J Wong, D Denisenko, ...
Proceedings of the International Conference on Engineering of Reconfigurable …, 2012
452012
Configuring a programmable device using high-level language
DTL Chen, D Singh
US Patent 8,959,469, 2015
442015
OpenCL compilation
DTL Chen, D Singh
US Patent 9,134,981, 2015
392015
Constrained clock shifting for field programmable gate arrays
DP Singh, SD Brown
Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002
382002
Method and apparatus for performing physical synthesis hill-climbing on multi-processor machines
I Blunno, GR Chiu, D Singh, V Manohararajah, SD Brown
US Patent 7,500,216, 2009
342009
Programmable logic devices with skewed clocking signals
D Singh, A Hall
US Patent 7,107,477, 2006
292006
Harnessing the power of FPGAs using altera's OpenCL compiler
DP Singh, TS Czajkowski, A Ling
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013
282013
FPGA PLB architecture evaluation and area optimization techniques using boolean satisfiability
AC Ling, DP Singh, SD Brown
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
282007
The system can't perform the operation now. Try again later.
Articles 1–20