| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 507 | 2020 |
| Enabling reproducible and agile full-system simulation BR Bruce, A Akram, H Nguyen, K Roarty, M Samani, M Friborz, T Reddy, ... 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021 | 32 | 2021 |
| LLM: Realizing low-latency memory by exploiting embedded silicon photonics for irregular workloads M Fariborz, M Samani, P Fotouhi, R Proietti, IM Yi, V Akella, ... International Conference on High Performance Computing, 44-64, 2022 | 6 | 2022 |
| A model for scalable and balanced accelerators for graph processing M Fariborz, M Samani, T O'Neill, J Lowe-Power, SJB Yoo, V Akella IEEE Computer Architecture Letters 21 (2), 149-152, 2022 | 5 | 2022 |
| NOVA: A Novel Vertex Management Architecture for Scalable Graph Processing M Fariborz, M Samani, A York, SJB Yoo, J Lowe-Power, V Akella 2025 IEEE International Symposium on High Performance Computer Architecture …, 2025 | 3 | 2025 |
| Tegra--scaling up terascale graph processing with disaggregated computing W Shaddix, M Samani, M Fariborz, SJ Yoo, J Lowe-Power, V Akella arXiv preprint arXiv:2404.03155, 2024 | 3 | 2024 |
| Methodologies for evaluating memory models in gem5 M Samani University of California, Davis, 2021 | 3 | 2021 |
| Implications of full-system modeling for superconducting architectures K Pai, M Samani, A Nand, J Lowe-Power Proceedings of the SC'25 Workshops of the International Conference for High …, 2025 | 1 | 2025 |
| Reproducibility and Standardization in gem5 Resources v25. 0 K Pai, H Patel, E Le, N Krim, M Samani, BR Bruce, J Lowe-Power arXiv preprint arXiv:2512.13479, 2025 | | 2025 |
| TEGRA-Scaling Up Graph Processing with Disaggregated Computing W Shaddix, M Samani, J Lowe-Power, V Akella Proceedings of the SC'25 Workshops of the International Conference for High …, 2025 | | 2025 |
| Portable Targeted Sampling Framework Using LLVM Z Qiu, M Samani, J Lowe-Power arXiv preprint arXiv:2509.02873, 2025 | | 2025 |
| Scalable Hardware Acceleration of Graph Processing with Photonic Interconnects V Akella, M Fariborz, M Samani, SJB Yoo, J Lowe-Power 2023 International Conference on Photonics in Switching and Computing (PSC), 1-3, 2023 | | 2023 |
| Artifact Evaluation Committee A Akram, H Sadasivan, M Samani, M Hildebrand, M Babaie, MR Ardakani, ... | | |
| A CUDA-based Batcher-Banyan Network for Bitonic Sort K Vali, M Samani, M del Rosario | | |
Jason Lowe-PowerAssociate Professor, University of California, DavisVerified email at ucdavis.edu
