| Hybrid tlb coalescing: Improving tlb translation coverage under diverse fragmented memory allocations CH Park, T Heo, J Jeong, J Huh Proceedings of the 44th Annual International Symposium on Computer …, 2017 | 123 | 2017 |
| Efficient hardware-assisted logging with asynchronous and direct-update for persistent memory J Jeong, CH Park, J Huh, S Maeng 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 68 | 2018 |
| Every Walk's a Hit: Making Page Walks Single-Access Cache Hits CH Park, I Vougioukas, A Sandberg, D Black-Schaffer 27th ACM International Conference on Architectural Support for Programming …, 2022 | 60* | 2022 |
| Perforated Page: Supporting Fragmented Memory Allocation for Large Pages CH Park, S Cha, B Kim, Y Kwon, D Black-Schaffer, J Huh 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020 | 52 | 2020 |
| Micro-sliced virtual processors to hide the effect of discontinuous cpu availability for consolidated systems J Ahn, CH Park, J Huh 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 394-405, 2014 | 41 | 2014 |
| Efficient synonym filtering and scalable delayed translation for hybrid virtual caching CH Park, T Heo, J Huh ACM SIGARCH Computer Architecture News 44 (3), 217-229, 2016 | 33 | 2016 |
| A Reusable Characterization of the Memory System Behavior of SPEC2017 and SPEC2006 M Hassan, CH Park, D Black-Schaffer ACM Transactions on Architecture and Code Optimization (TACO) 18 (2), 1-20, 2021 | 20 | 2021 |
| Accelerating critical OS services in virtualized systems with flexible micro-sliced cores J Ahn, CH Park, T Heo, J Huh Proceedings of the Thirteenth EuroSys Conference, 1-14, 2018 | 13 | 2018 |
| Architecturally-independent and time-based characterization of SPEC CPU 2017 M Hassan, CH Park, D Black-Schaffer 2020 IEEE International Symposium on Performance Analysis of Systems and …, 2020 | 8 | 2020 |
| Exploring the latency sensitivity of cache replacement policies A Nematallah, CH Park, D Black-Schaffer IEEE Computer Architecture Letters 22 (2), 93-96, 2023 | 5 | 2023 |
| Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds T Kim, CH Park, J Huh, J Ahn IEEE Transactions on Parallel and Distributed Systems 31 (10), 2453-2465, 2020 | 5 | 2020 |
| Morphable DRAM cache design for hybrid memory systems S Cha, B Kim, CH Park, J Huh ACM Transactions on Architecture and Code Optimization (TACO) 16 (3), 1-24, 2019 | 5 | 2019 |
| Large-scale Graph Processing on Commodity Systems: Understanding and Mitigating the Impact of Swapping A Haddadi, D Black-Schaffer, CH Park Proceedings of the International Symposium on Memory Systems, 1-11, 2023 | 3 | 2023 |
| Pimba: A Processing-in-Memory Acceleration for Post-Transformer Large Language Model Serving W Kim, Y Lee, Y Kim, J Hwang, S Oh, J Jung, A Huseynov, WG Park, ... Proceedings of the 58th IEEE/ACM International Symposium on …, 2025 | 2 | 2025 |
| Protean: Resource-efficient Instruction Prefetching M Hassan, CH Park, D Black-Schaffer Proceedings of the International Symposium on Memory Systems, 1-13, 2023 | 2 | 2023 |
| Virtual Snooping Coherence for Multi-Core Virtualized Systems D Kim, CH Park, H Kim, J Huh IEEE Transactions on Parallel and Distributed Systems 27 (7), 2155-2167, 2015 | 2 | 2015 |
| Accelerating Page Migrations in Operating Systems with Intel DSA J Baik, J Kim, CH Park, J Ahn IEEE Computer Architecture Letters, 2025 | 1 | 2025 |
| Second-level Caches: Not for Instructions M Hassan, CH Park, D Black-Schaffer ACM Transactions on Architecture and Code Optimization, 2024 | 1 | 2024 |
| Supporting Dynamic Translation Granularity for Hybrid Memory Systems B Kim, S Hwang, S Cha, CH Park, J Park, J Huh 2022 IEEE 40th International Conference on Computer Design (ICCD), 25-32, 2022 | 1 | 2022 |
| Page Tables: Keeping them Flat and Hot (Cached) CH Park, I Vougioukas, A Sandberg, D Black-Schaffer arXiv preprint arXiv:2012.05079, 2020 | 1 | 2020 |
Jaehyuk HuhKAISTVerified email at casys.kaist.ac.kr
