| The datacenter as a computer: Designing warehouse-scale machines LA Barroso, U Hölzle, P Ranganathan Springer Nature, 2019 | 3499* | 2019 |
| Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction R Kumar, KI Farkas, NP Jouppi, P Ranganathan, DM Tullsen Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003 | 1129 | 2003 |
| Making Scheduling" Cool": Temperature-Aware Workload Placement in Data Centers. JD Moore, JS Chase, P Ranganathan, RK Sharma USENIX annual technical conference, General Track 4, 61-75, 2005 | 1055 | 2005 |
| Single-ISA heterogeneous multi-core architectures for multithreaded workload performance R Kumar, DM Tullsen, P Ranganathan, NP Jouppi, KI Farkas ACM SIGARCH Computer Architecture News 32 (2), 64, 2004 | 904 | 2004 |
| No" power" struggles: coordinated multi-level power management for the data center R Raghavendra, P Ranganathan, V Talwar, Z Wang, X Zhu Proceedings of the 13th international conference on Architectural support …, 2008 | 894 | 2008 |
| Heracles: Improving resource efficiency at scale D Lo, L Cheng, R Govindaraju, P Ranganathan, C Kozyrakis Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 756 | 2015 |
| Profiling a warehouse-scale computer S Kanev, JP Darago, K Hazelwood, P Ranganathan, T Moseley, GY Wei, ... Proceedings of the 42nd annual international symposium on computer …, 2015 | 722 | 2015 |
| Disaggregated memory for expansion and sharing in blade servers K Lim, J Chang, T Mudge, P Ranganathan, SK Reinhardt, TF Wenisch ACM SIGARCH computer architecture news 37 (3), 267-278, 2009 | 662 | 2009 |
| Consistent and durable data structures for {Non-Volatile}{Byte-Addressable} memory S Venkataraman, N Tolia, P Ranganathan, RH Campbell 9th USENIX Conference on File and Storage Technologies (FAST 11), 2011 | 555 | 2011 |
| Storing cache metadata separately from integrated circuit containing cache controller J Chang, JJ Meza, P Ranganathan US Patent 10,474,584, 2019 | 548 | 2019 |
| Full-system power analysis and modeling for server environments D Economou, S Rivoire, C Kozyrakis, P Ranganathan | 535 | 2006 |
| Ensemble-level power management for dense blade servers P Ranganathan, P Leech, D Irwin, J Chase ACM SIGARCH computer architecture news 34 (2), 66-77, 2006 | 534 | 2006 |
| A power benchmarking framework for network devices P Mahadevan, P Sharma, S Banerjee, P Ranganathan International conference on research in networking, 795-808, 2009 | 532 | 2009 |
| Google workloads for consumer devices: Mitigating data movement bottlenecks A Boroumand, S Ghose, Y Kim, R Ausavarungnirun, E Shiu, R Thakur, ... Proceedings of the twenty-third international conference on architectural …, 2018 | 523 | 2018 |
| Heterogeneous chip multiprocessors R Kumar, DM Tullsen, NP Jouppi, P Ranganathan Computer 38 (11), 32-38, 2005 | 515 | 2005 |
| Dynamically selecting processor cores for overall power efficiency K Farkas, NP Jouppi, RN Mayo, P Ranganathan US Patent 7,093,147, 2006 | 484 | 2006 |
| A comparison of high-level full-system power models. S Rivoire, P Ranganathan, C Kozyrakis HotPower 8 (2), 32-39, 2008 | 462 | 2008 |
| Reconfigurable caches and their application to media processing P Ranganathan, S Adve, NP Jouppi ACM SIGARCH Computer Architecture News 28 (2), 214-224, 2000 | 405 | 2000 |
| JouleSort: a balanced energy-efficiency benchmark S Rivoire, MA Shah, P Ranganathan, C Kozyrakis Proceedings of the 2007 ACM SIGMOD international conference on Management of …, 2007 | 395 | 2007 |
| GViM: GPU-accelerated virtual machines V Gupta, A Gavrilovska, K Schwan, H Kharche, N Tolia, V Talwar, ... Proceedings of the 3rd ACM Workshop on System-level virtualization for High …, 2009 | 386 | 2009 |
Jichuan ChangPrincipal Engineer at GoogleVerified email at acm.org
