| 20 GHz operation of an asynchronous wave-pipelined RSFQ arithmetic-logic unit TV Filippov, A Sahu, AF Kirichenko, IV Vernik, M Dorojevets, CL Ayala, ... Physics Procedia 36, 59-65, 2012 | 129 | 2012 |
| Mana: A monolithic adiabatic integration architecture microprocessor using 1.4-zj/op unshunted superconductor josephson junction devices CL Ayala, T Tanaka, R Saito, M Nozoe, N Takeuchi, N Yoshikawa IEEE Journal of Solid-State Circuits 56 (4), 1152-1165, 2020 | 105 | 2020 |
| 8-bit asynchronous wave-pipelined RSFQ arithmetic-logic unit T Filippov, M Dorojevets, A Sahu, A Kirichenko, C Ayala, O Mukhanov IEEE transactions on applied superconductivity 21 (3), 847-851, 2011 | 90 | 2011 |
| ColdFlux superconducting EDA and TCAD tools project: Overview and progress CJ Fourie, K Jackman, MM Botha, S Razmkhah, P Febvre, CL Ayala, Q Xu, ... IEEE Transactions on Applied Superconductivity 29 (5), 1-7, 2019 | 79 | 2019 |
| An adiabatic superconductor 8-bit adder with 24kBT energy dissipation per junction N Takeuchi, T Yamae, CL Ayala, H Suzuki, N Yoshikawa Applied Physics Letters 114 (4), 2019 | 73 | 2019 |
| 16-bit wave-pipelined sparse-tree RSFQ adder M Dorojevets, CL Ayala, N Yoshikawa, A Fujimaki IEEE transactions on applied superconductivity 23 (3), 1700605-1700605, 2012 | 54 | 2012 |
| 8-bit asynchronous sparse-tree superconductor RSFQ arithmetic-logic unit with a rich set of operations M Dorojevets, CL Ayala, N Yoshikawa, A Fujimaki IEEE transactions on applied superconductivity 23 (3), 1700104-1700104, 2012 | 50 | 2012 |
| Adiabatic quantum-flux-parametron: A tutorial review N Takeuchi, T Yamae, CL Ayala, H Suzuki, N Yoshikawa IEICE Transactions on Electronics 105 (6), 251-263, 2022 | 47 | 2022 |
| Synthesis flow for cell-based adiabatic quantum-flux-parametron structural circuit generation with HDL back-end verification Q Xu, CL Ayala, N Takeuchi, Y Murai, Y Yamanashi, N Yoshikawa IEEE Transactions on Applied Superconductivity 27 (4), 1-5, 2017 | 47 | 2017 |
| A semi-custom design methodology and environment for implementing superconductor adiabatic quantum-flux-parametron microprocessors CL Ayala, R Saito, T Tanaka, O Chen, N Takeuchi, Y He, N Yoshikawa Superconductor Science and Technology 33 (5), 054006, 2020 | 43 | 2020 |
| Towards 32-bit energy-efficient superconductor RQL processors: The cell-level design and analysis of key processing and on-chip storage units M Dorojevets, Z Chen, CL Ayala, AK Kasperek IEEE Transactions on Applied Superconductivity 25 (3), 1-8, 2014 | 39 | 2014 |
| Design and implementation of a 16-word by 1-bit register file using adiabatic quantum flux parametron logic N Tsuji, CL Ayala, N Takeuchi, T Ortlepp, Y Yamanashi, N Yoshikawa IEEE Transactions on Applied Superconductivity 27 (4), 1-4, 2017 | 36 | 2017 |
| Data-flow microarchitecture for wide datapath RSFQ processors: Design study M Dorojevets, CL Ayala, AK Kasperek IEEE transactions on applied superconductivity 21 (3), 787-791, 2010 | 36 | 2010 |
| Majority-logic-optimized parallel prefix carry look-ahead adder families using adiabatic quantum-flux-parametron logic CL Ayala, N Takeuchi, Y Yamanashi, T Ortlepp, N Yoshikawa IEEE Transactions on Applied Superconductivity 27 (4), 1-7, 2016 | 34 | 2016 |
| A compact AQFP logic cell design using an 8-metal layer superconductor process Y He, CL Ayala, N Takeuchi, T Yamae, Y Hironaka, A Sahu, V Gupta, ... Superconductor Science and Technology 33 (3), 035010, 2020 | 33 | 2020 |
| Amorphous carbon active contact layer for reliable nanoelectromechanical switches D Grogg, CL Ayala, U Drechsler, A Sebastian, WW Koelmans, SJ Bleiker, ... 2014 IEEE 27th international conference on micro electro mechanical systems …, 2014 | 33 | 2014 |
| Development and demonstration of routing and placement EDA tools for large-scale adiabatic quantum-flux-parametron circuits Y Murai, CL Ayala, N Takeuchi, Y Yamanashi, N Yoshikawa IEEE Transactions on Applied Superconductivity 27 (6), 1-9, 2017 | 29 | 2017 |
| HDL-based modeling approach for digital simulation of adiabatic quantum flux parametron logic Q Xu, CL Ayala, N Takeuchi, Y Yamanashi, N Yoshikawa IEEE Transactions on Applied Superconductivity 26 (8), 1-5, 2016 | 29 | 2016 |
| Energy and latency optimization in NEM relay-based digital circuits S Rana, T Qin, A Bazigos, D Grogg, M Despont, CL Ayala, C Hagleitner, ... IEEE Transactions on Circuits and Systems I: Regular Papers 61 (8), 2348-2359, 2014 | 27 | 2014 |
| Design and characterization of track routing architecture for RSFQ and AQFP circuits in a multilayer process CJ Fourie, CL Ayala, L Schindler, T Tanaka, N Yoshikawa IEEE Transactions on Applied Superconductivity 30 (6), 1-9, 2020 | 26 | 2020 |
Nobuyuki YoshikawaYokohama National UniveristyVerified email at ynu.ac.jp
