| Complete system power estimation using processor performance events WL Bircher, LK John IEEE Transactions on Computers 61 (4), 563-577, 2011 | 311 | 2011 |
| Complete system power estimation: A trickle-down approach based on performance events WL Bircher, LK John 2007 ieee international symposium on performance analysis of systems …, 2007 | 260 | 2007 |
| Runtime identification of microprocessor energy saving opportunities WL Bircher, M Valluri, J Law, LK John Proceedings of the 2005 international symposium on Low power electronics and …, 2005 | 156 | 2005 |
| Analysis of dynamic power management on multi-core processors WL Bircher, LK John Proceedings of the 22nd annual international conference on Supercomputing …, 2008 | 109 | 2008 |
| AUDIT: Stress testing the automatic way Y Kim, LK John, S Pant, S Manne, M Schulte, WL Bircher, MSS Govindan 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 212-223, 2012 | 104 | 2012 |
| Cooperative boosting: Needy versus greedy power management I Paul, S Manne, M Arora, WL Bircher, S Yalamanchili ACM SIGARCH Computer Architecture News 41 (3), 285-296, 2013 | 75 | 2013 |
| Method and apparatus for demand-based control of processing node performance A Branover, M Steinman, WL Bircher US Patent 8,484,498, 2013 | 70 | 2013 |
| System-level max power (SYMPO) a systematic approach for escalating system-level power consumption using synthetic benchmarks K Ganesan, J Jo, WL Bircher, D Kaseridis, Z Yu, LK John Proceedings of the 19th international conference on Parallel architectures …, 2010 | 70 | 2010 |
| Predictive power management for multi-core processors WL Bircher, L John International Symposium on Computer Architecture, 243-255, 2010 | 45 | 2010 |
| Effective use of performance monitoring counters for run-time prediction of power W Bircher, J Law, M Valluri, LK John University of Texas at Austin Technical Report TR-041104 1, 2004 | 39 | 2004 |
| Adjusting the clock frequency of a processing unit in real-time based on a frequency sensitivity value WL Bircher US Patent App. 13/108,165, 2012 | 35 | 2012 |
| Idle Phase Prediction For Integrated Circuits Y ECKERT, S Manne, WL Bircher, MSS Govindan, MJ Schulte US Patent App. 13/723,868, 2014 | 30 | 2014 |
| Idle phase exit prediction Y ECKERT, S Manne, WL Bircher, MSS Govindan, MJ Schulte, M Arora US Patent 9,110,671, 2015 | 29 | 2015 |
| Early cache prefetching in preparation for exit from idle mode MSS Govindan, WL Bircher, A Dasgupta, D Zhan US Patent 9,904,623, 2018 | 27 | 2018 |
| Predicting power management state duration on a per-process basis and modifying cache size based on the predicted duration WL Bircher, MSS Govindan, M Arora, MJ Schulte, NS Jayasena US Patent 9,720,487, 2017 | 25 | 2017 |
| Core-level activity prediction for multicore power management WL Bircher, LK John IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (3 …, 2011 | 22 | 2011 |
| Setting power-state limits based on performance coupling and thermal coupling between entities in a computing device I Paul, M Arora, S Manne, WL Bircher US Patent 9,946,319, 2018 | 14 | 2018 |
| Thermally-aware process scheduling I Paul, M Arora, WL Bircher US Patent 9,886,326, 2018 | 14 | 2018 |
| Thermal management of a portable computing device W Huang, WL Bircher US Patent App. 13/913,692, 2014 | 8 | 2014 |
| Apparatus and Method for Fast Cache Shutdown S Manne, WL Bircher, MSS Govindan, JM O'Connor, MJ Schulte US Patent App. 13/435,539, 2013 | 8 | 2013 |
