| Priority based simultaneous multi-threading E Cota-Robles US Patent 6,658,447, 2003 | 287 | 2003 |
| Virtual translation lookaside buffer G Neiger, S Chou, E Cota-Robles, S Jeyasingh, A Kagi, M Kozuch, ... US Patent 6,907,600, 2005 | 254 | 2005 |
| Tracking operating system process and thread execution and virtual machine execution in hardware or in a virtual machine monitor E Cota-Robles, S Schoenberg, S Jeyasingh, A Kagi, M Kozuch, G Neiger, ... US Patent 20,030,037,089, 0 | 244* | |
| Reclaiming existing fields in address translation data structures to extend control over memory accesses R Uhlig, G Neiger, E Cota-Robles, S Jeyasingh, A Kagi, M Kozuch, ... US Patent 7,073,042, 2006 | 184 | 2006 |
| System and method to deprivilege components of a virtual machine monitor AV Anderson, SM Bennett, E Cota-Robles, A Kägi, G Neiger, ... US Patent 7,757,231, 2010 | 167 | 2010 |
| Handling faults associated with operation of guest software in the virtual-machine architecture R Uhlig, AV Anderson, S Bennett, E Cota-Robles, S Jeyasingh, A Kagi, ... US Patent 6,996,748, 2006 | 127* | 2006 |
| Delivering Interrupts Directly To A Virtual Processor G Neiger, RS Madukkarumukumana, RA Uhlig, U Steinberg, ... US Patent 20,120,331,467, 2012 | 126 | 2012 |
| Optimizing system behavior in a virtual machine environment AV Anderson, SM Bennett, EC Cota-Robles, S Jeyasingh, A Kägi, ... US Patent 7,886,293, 2011 | 119 | 2011 |
| Method for resolving address space conflicts between a virtual machine monitor and a guest operating system G Neiger, S Chou, E Cota-Robles, S Jeyasingh, A Kagi, M Kozuch, ... US Patent 7,035,963, 2006 | 117 | 2006 |
| Method and apparatus for constructing host processor soft devices independent of the host processor operating system E Cota-Robles, S Chou, S Jeyasingh, A Kagi, M Kozuch, G Neiger, ... US Patent 20,020,143,842, 2007 | 115 | 2007 |
| System and method for binding virtual machines to hardware contexts EC Cota-Robles, RL Campbell, CD Hall, G Neiger, RA Uhlig US Patent 7,296,267, 2007 | 108 | 2007 |
| Mechanism for controlling external interrupts in a virtual machine system S Bennett, M Kozuch, G Neiger, E Cota-Robles, S Jeyasingh, A Kagi, ... US Patent App. 10/318,248, 2004 | 106 | 2004 |
| System and method for controlling switching between VMM and VM using enabling value of VMM timer indicator and VMM timer value having a specified time G Neiger, SM Bennett, E Cota-Robles, S Schoenberg, CD Hall, ... US Patent 7,840,962, 2010 | 101 | 2010 |
| Method and apparatus for scheduling virtual machine access to shared resources A Kagi, AV Anderson, SM Bennett, EC Cota-Robles, GM Jablonski US Patent 7,797,699, 2010 | 101 | 2010 |
| Providing support for a timer associated with a virtual machine monitor G Neiger, SM Bennett, E Cota-Robles, S Schoenberg, CD Hall, ... US Patent 20,060,075,402, 2006 | 101* | 2006 |
| Mechanism for providing power management through virtualization M Kozuch, S Chou, E Cota-Robles, S Jeyasingh, A Kagi, G Neiger, ... US Patent 7,225,441, 2007 | 96 | 2007 |
| Chipset support for managing hardware interrupts in a virtual machine system S Jeyasingh, AV Anderson, SM Bennett, E Cota-Robles, A Kagi, G Neiger, ... US Patent 7,177,967, 2007 | 96 | 2007 |
| Methods and systems to control virtual machines S Bennett, G Neiger, E Cota-Robles, S Jeyasingh, A Kagi, M Kozuch, ... US Patent 20,040,117,539, 2008 | 95 | 2008 |
| Control register access virtualization performance improvement in the virtual-machine architecture S Bennett, AV Anderson, E Cota-Robles, S Jeyasingh, A Kagi, G Neiger, ... US Patent 7,127,548, 2006 | 89 | 2006 |
| Real-time scheduling of virtual machines EC Cota-Robles, K Flautner US Patent 7,356,817, 2008 | 84 | 2008 |
Michael A. KozuchIntelVerified email at intel.com
