| Findings of the 2022 conference on machine translation (WMT22) T Kocmi, R Bawden, O Bojar, A Dvorkovich, C Federmann, M Fishel, ... Proceedings of the Seventh Conference on Machine Translation (WMT), 1-45, 2022 | 363 | 2022 |
| The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer A Iwata, N Sakimura, M Nagata, T Morie IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1999 | 172 | 1999 |
| Substrate noise coupling in SoC design: Modeling, avoidance, and validation A Afzali-Kusha, M Nagata, NK Verghese, DJ Allstot Proceedings of the IEEE 94 (12), 2109-2138, 2007 | 150 | 2007 |
| Measurements and analyses of substrate noise waveform in mixed-signal IC environment M Nagata, J Nagai, T Morie, A Iwata IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 121 | 2002 |
| A built-in technique for probing power supply and ground noise distribution within large-scale digital integrated circuits M Nagata, T Okumoto, K Taki IEEE Journal of Solid-State Circuits 40 (4), 813-819, 2005 | 119 | 2005 |
| Physical design guides for substrate noise reduction in CMOS digital circuits M Nagata, J Nagai, K Hijikata, T Morie, A Iwata IEEE Journal of Solid-State Circuits 36 (3), 539-549, 2002 | 118 | 2002 |
| Method of analyzing operation of semiconductor integrated circuit device, analyzing apparatus used in the same, and optimization designing method using the same K Shimazaki, K Satoh, H Tsujikawa, S Hirano, M Nagata US Patent App. 11/231,810, 2006 | 111 | 2006 |
| Breakdown of the quantum Hall effect in GaAs/AlGaAs heterostructures due to current S Kawaji, K Hirakawa, M Nagata, T Okamoto, T Fukase, T Gotoh Journal of the Physical Society of Japan 63 (6), 2303-2313, 1994 | 94 | 1994 |
| Em attack is non-invasive?-design methodology and validity verification of em attack sensor N Homma, Y Hayashi, N Miura, D Fujimoto, D Tanaka, M Nagata, T Aoki International Workshop on Cryptographic Hardware and Embedded Systems, 1-16, 2014 | 79 | 2014 |
| Physical attack protection techniques for IC chip level hardware security M Nagata, T Miki, N Miura IEEE transactions on very large scale integration (VLSI) systems 30 (1), 5-14, 2021 | 61 | 2021 |
| Pll to the rescue: a novel em fault countermeasure N Miura, Z Najm, W He, S Bhasin, XT Ngo, M Nagata, JL Danger Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 60 | 2016 |
| A concept of analog-digital merged circuit architecture for future VLSI's A Iwata, M Nagata IEICE transactions on fundamentals of electronics, communications and …, 1996 | 59 | 1996 |
| Device-width dependence of plateau width in quantum Hall states S Kawaji, K Hirakawa, M Nagata Physica B: Condensed Matter 184 (1-4), 17-20, 1993 | 59 | 1993 |
| An on-chip waveform capturer and application to diagnosis of power delivery in SoC integration T Hashida, M Nagata IEEE Journal of Solid-State Circuits 46 (4), 789-796, 2011 | 57 | 2011 |
| A local EM-analysis attack resistant cryptographic engine with fully-digital oscillator-based tamper-access sensor N Miura, D Fujimoto, D Tanaka, Y Hayashi, N Homma, T Aoki, M Nagata 2014 symposium on VLSI circuits digest of technical papers, 1-2, 2014 | 55 | 2014 |
| Ring oscillator under laser: potential of pll-based countermeasure against laser fault injection W He, J Breier, S Bhasin, N Miura, M Nagata 2016 Workshop on fault diagnosis and tolerance in cryptography (FDTC), 102-113, 2016 | 53 | 2016 |
| A random interrupt dithering SAR technique for secure ADC against reference-charge side-channel attack T Miki, N Miura, H Sonoda, K Mizuta, M Nagata IEEE Transactions on Circuits and Systems II: Express Briefs 67 (1), 14-18, 2019 | 51 | 2019 |
| On-chip signal waveform measurement apparatus for measuring signal waveforms at detection points on IC chip M Nagata US Patent 7,332,916, 2008 | 50 | 2008 |
| A PWM signal processing core circuit based on a switched current integration technique M Nagata, J Funakoshi, A Iwata IEEE Journal of Solid-State Circuits 33 (1), 53-60, 1998 | 50 | 1998 |
| A 100GB/s wide I/O with 4096b TSVs through an active silicon interposer with in-place waveform capturing S Takaya, M Nagata, A Sakai, T Kariya, S Uchiyama, H Kobayashi, ... 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 48 | 2013 |
