| Power-up SRAM state as an identifying fingerprint and source of true random numbers DE Holcomb, WP Burleson, K Fu IEEE Transactions on Computers 58 (9), 1198-1210, 2008 | 1129 | 2008 |
| Initial SRAM state as a fingerprint and source of true random numbers for RFID tags DE Holcomb, WP Burleson, K Fu Proceedings of the Conference on RFID Security 7 (2), 01, 2007 | 542 | 2007 |
| PUFs at a glance U Rührmair, DE Holcomb 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 367 | 2014 |
| FPGA Side Channel Attacks without Physical Access C Ramesh, SB Patil, SN Dhanuskodi, G Provelengios, S Pillement, ... Field-Programmable Custom Computing Machines (FCCM), 2018 IEEE 26th Annual …, 2018 | 193 | 2018 |
| Physical Design Obfuscation of Hardware: A Comprehensive Investigation of Device-and Logic-Level Techniques A Vijayakumar, VC Patil, DE Holcomb, C Paar, S Kundu IEEE Transactions on Information Forensics and Security, 2016 | 131 | 2016 |
| Low-power sub-threshold design of secure physical unclonable functions L Lin, D Holcomb, DK Krishnappa, P Shabadi, W Burleson Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010 | 116 | 2010 |
| Persistent Clocks for Batteryless Sensing Devices J HESTER, N TOBIAS, A RAHMATI, L SITANAYAH, D HOLCOMB, K FU, ... ACM Transactions on Embedded Computing Systems (TECS) 15 (4), 77:1--77:28, 2016 | 110 | 2016 |
| TARDIS: Time and Remanence Decay in SRAM to Implement Secure Protocols on Embedded Devices without Clocks. A Rahmati, M Salajegheh, DE Holcomb, J Sorber, WP Burleson, K Fu USENIX Security Symposium, 221-236, 2012 | 110 | 2012 |
| A provable key destruction scheme based on memristive crossbar arrays H Jiang, C Li, R Zhang, P Yan, P Lin, Y Li, JJ Yang, D Holcomb, Q Xia Nature Electronics 1 (10), 548-554, 2018 | 96 | 2018 |
| Nanoscale diffusive memristor crossbars as physical unclonable functions R Zhang, H Jiang, ZR Wang, P Lin, Y Zhuo, D Holcomb, DH Zhang, ... Nanoscale 10 (6), 2721-2726, 2018 | 91 | 2018 |
| Characterizing Power Distribution Attacks in Multi-User FPGA Environments G Provelengios, D Holcomb, R Tessier 2019 29th International Conference on Field Programmable Logic and …, 2019 | 90 | 2019 |
| Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration MA Usmani, S Keshavarz, E Matthews, L Shannon, R Tessier, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (2), 364-375, 2018 | 86 | 2018 |
| Incremental SAT-based reverse engineering of camouflaged logic circuits C Yu, X Zhang, D Liu, M Ciesielski, D Holcomb IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 85 | 2017 |
| Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs S Moini, S Tian, D Holcomb, J Szefer, R Tessier IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021 | 83 | 2021 |
| Design as you see FIT: System-level soft error analysis of sequential circuits D Holcomb, W Li, SA Seshia 2009 Design, Automation & Test in Europe Conference & Exhibition, 785-790, 2009 | 77 | 2009 |
| Security evaluation and enhancement of bistable ring PUFs X Xu, U Rührmair, DE Holcomb, W Burleson International Workshop on Radio Frequency Identification: Security and …, 2015 | 72 | 2015 |
| Bitline PUF: building native challenge-response PUF capability into any SRAM DE Holcomb, K Fu International Workshop on Cryptographic Hardware and Embedded Systems, 510-526, 2014 | 69 | 2014 |
| Power wasting circuits for cloud FPGA attacks G Provelengios, D Holcomb, R Tessier 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 65 | 2020 |
| Trajectory model validation using newly developed altitude‐controlled balloons during the International Consortium for Atmospheric Research on Transport and Transformations … EE Riddle, PB Voss, A Stohl, D Holcomb, D Maczka, K Washburn, ... Journal of Geophysical Research: Atmospheres 111 (D23), 2006 | 65 | 2006 |
| Oracle-Guided Incremental SAT Solving to Reverse Engineer Camouflaged Logic Circuits D Liu, C Yu, X Zhang, D Holcomb Proceedings of Design Automation and Test in Europe (DATE '16), 433-438, 2016 | 64 | 2016 |
