| Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime Y Cai, G Yalcin, O Mutlu, EF Haratsch, A Cristal, OS Unsal, K Mai 2012 IEEE 30th International Conference on Computer Design (ICCD), 94-101, 2012 | 334 | 2012 |
| Redundant memory mappings for fast access to large memories V Karakostas, J Gandhi, F Ayar, A Cristal, MD Hill, KS McKinley, ... ACM SIGARCH Computer Architecture News 43 (3S), 66-78, 2015 | 226 | 2015 |
| Out-of-order commit processors A Cristal, D Ortega, J Llosa, M Valero 10th International Symposium on High Performance Computer Architecture (HPCA …, 2004 | 174 | 2004 |
| Didi: Mitigating the performance impact of tlb shootdowns using a shared tlb directory C Villavieja, V Karakostas, L Vilanova, Y Etsion, A Ramirez, A Mendelson, ... 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 165 | 2011 |
| EazyHTM: Eager-lazy hardware transactional memory S Tomić, C Perfumo, C Kulkarni, A Armejach, A Cristal, O Unsal, T Harris, ... Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009 | 160 | 2009 |
| Transactional memory: An overview T Harris, A Cristal, OS Unsal, E Ayguade, F Gagliardi, B Smith, M Valero IEEE micro 27 (3), 8-29, 2007 | 130 | 2007 |
| Neighbor-cell assisted error correction for MLC NAND flash memories Y Cai, G Yalcin, O Mutlu, EF Haratsch, O Unsal, A Cristal, K Mai ACM SIGMETRICS Performance Evaluation Review 42 (1), 491-504, 2014 | 113 | 2014 |
| Atomic quake: using transactional memory in an interactive multiplayer game server F Zyulkyarov, V Gajinov, OS Unsal, A Cristal, E Ayguadé, T Harris, ... Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of …, 2009 | 113 | 2009 |
| Toward kilo-instruction processors A Cristal, OJ Santana, M Valero, JF Martínez ACM Transactions on Architecture and Code Optimization (TACO) 1 (4), 389-417, 2004 | 111 | 2004 |
| Error analysis and retention-aware error management for NAND flash memory. Y Cai, G Yalcin, O Mutlu, EF Haratsch, A Crista, OS Unsal, K Mai Intel Technology Journal 17 (1), 2013 | 108 | 2013 |
| On the resilience of rtl nn accelerators: Fault characterization and mitigation B Salami, OS Unsal, AC Kestelman 2018 30th International Symposium on Computer Architecture and High …, 2018 | 107 | 2018 |
| Kilo-instruction processors: Overcoming the memory wall A Cristal, OJ Santana, F Cazorla, M Galluzzi, T Ramirez, M Pericas, ... IEEE micro 25 (3), 48-57, 2005 | 92 | 2005 |
| Energy-efficient address translation V Karakostas, J Gandhi, A Cristal, MD Hill, KS McKinley, M Nemirovsky, ... 2016 ieee international symposium on high performance computer architecture …, 2016 | 85 | 2016 |
| A content aware integer register file organization G Gonzalez, A Cristal, D Ortega, A Veidenbaum, M Valero ACM SIGARCH Computer Architecture News 32 (2), 314, 2004 | 80 | 2004 |
| Quaketm: parallelizing a complex sequential application using transactional memory V Gajinov, F Zyulkyarov, OS Unsal, A Cristal, E Ayguade, T Harris, ... Proceedings of the 23rd international conference on Supercomputing, 126-135, 2009 | 78 | 2009 |
| A machine learning approach for performance prediction and scheduling on heterogeneous CPUs D Nemirovsky, T Arkose, N Markovic, M Nemirovsky, O Unsal, A Cristal 2017 29th International Symposium on Computer Architecture and High …, 2017 | 77 | 2017 |
| An empirical evaluation of high-level synthesis languages and tools for database acceleration O Arcas-Abella, G Ndu, N Sonmez, M Ghasempour, A Armejach, ... 2014 24th International Conference on Field Programmable Logic and …, 2014 | 75 | 2014 |
| A flexible heterogeneous multi-core architecture M Pericas, A Cristal, FJ Cazorla, R Gonzalez, DA Jimenez, M Valero 16th International Conference on Parallel Architecture and Compilation …, 2007 | 75 | 2007 |
| Performance analysis of the memory management unit under scale-out workloads V Karakostas, OS Unsal, M Nemirovsky, A Cristal, M Swift 2014 IEEE International Symposium on Workload Characterization (IISWC), 1-12, 2014 | 74 | 2014 |
| Vitruvius+: An area-efficient RISC-V decoupled vector coprocessor for high performance computing applications F Minervini, O Palomar, O Unsal, E Reggiani, J Quiroga, J Marimon, ... ACM Transactions on Architecture and Code Optimization 20 (2), 1-25, 2023 | 72 | 2023 |
