[go: up one dir, main page]

Follow
Hafiz Md. Hasan Babu
Hafiz Md. Hasan Babu
Professor, Department of Computer Science and Engineering, University of Dhaka
Verified email at cse.univdhaka.edu - Homepage
Title
Cited by
Cited by
Year
Efficient approaches for designing reversible binary coded decimal adders
AK Biswas, MM Hasan, AR Chowdhury, HMH Babu
Microelectronics journal 39 (12), 1693-1703, 2008
1852008
Synthesis of full-adder circuit using reversible logic
HMH Babu, MR Islam, SMA Chowdhury, AR Chowdhury
17th International Conference on VLSI Design. Proceedings., 757-760, 2004
1312004
Reversible logic synthesis for minimization of full-adder circuit
HMH Babu, MR Islam, AR Chowdhury, SMA Chowdhury
Euromicro Symposium on Digital System Design, 2003. Proceedings., 50-54, 2003
1102003
Design of a compact reversible binary coded decimal adder circuit
HMH Babu, AR Chowdhury
Journal of systems architecture 52 (5), 272-282, 2006
852006
Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder
HMH Babu, AR Chowdhury
18th International Conference on VLSI Design Held Jointly with 4th …, 2005
852005
Efficient design of shift registers using reversible logic
NM Nayeem, MA Hossain, L Jamal, HMH Babu
2009 international conference on signal processing systems, 474-478, 2009
722009
Prevention of shoulder-surfing attacks using shifting condition using digraph substitution rules
A Islam, F Othman, N Sakib, HMH Babu
arXiv preprint arXiv:2305.06549, 2023
552023
Design of optimal reversible carry lookahead adder with optimal garbage and quantum cost
L Jamal, M Shamsujjoha, HMH Babu
International Journal of Engineering and Technology 2 (1), 44-50, 2012
542012
An efficient design of a reversible barrel shifter
I Hashmi, HMH Babu
2010 23rd International Conference on VLSI Design, 93-98, 2010
532010
Design of a compact reversible random access memory
F Sharmin, MMA Polash, M Shamsujjoha, L Jamal, HMH Babu
4th IEEE International Conference on Computer Science and Information …, 2011
512011
A low power fault tolerant reversible decoder using mos transistors
M Shamsujjoha, HMH Babu
2013 26th International Conference on VLSI Design and 2013 12th …, 2013
482013
Efficient reversible montgomery multiplier and its application to hardware cryptography
NM Nayeem, L Jamal, HMH Babu
Journal of computer science 5 (1), 49, 2009
482009
BreastMultiNet: A multi-scale feature fusion method using deep neural network to detect breast cancer
MM Rahman, MSI Khan, HMH Babu
Array 16, 100256, 2022
452022
Chi2-MI: A hybrid feature selection based machine learning approach in diagnosis of chronic kidney disease
SK Dey, KMM Uddin, HMH Babu, MM Rahman, A Howlader, KMA Uddin
Intelligent Systems with Applications 16, 200144, 2022
442022
Cost-efficient design of a quantum multiplier–accumulator unit
HMH Babu
Quantum Information Processing 16 (1), 30, 2017
412017
Empowering early detection: A web-based machine learning approach for PCOS prediction
MM Rahman, A Islam, F Islam, M Zaman, MR Islam, MSA Sakib, ...
Informatics in Medicine Unlocked 47, 101500, 2024
392024
AirNet: predictive machine learning model for air quality forecasting using web interface
MM Rahman, MEH Nayeem, MS Ahmed, KA Tanha, MSA Sakib, ...
Environmental Systems Research 13 (1), 44, 2024
372024
Novel reversible division hardware
NM Nayeem, A Hossain, M Haque, L Jamal, HMH Babu
2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 1134 …, 2009
372009
A novel approach to design BCD adder and carry skip BCD adder
AK Biswas, MM Hasan, M Hasan, AR Chowdhury, HMH Babu
21st international conference on VLSI design (VLSID 2008), 566-571, 2008
362008
Approach to design a compact reversible low power binary comparator
HM Hasan Babu, N Saleheen, L Jamal, SM Sarwar, T Sasao
IET Computers & Digital Techniques 8 (3), 129-139, 2014
292014
The system can't perform the operation now. Try again later.
Articles 1–20