| Truncated multiplication with correction constant [for DSP] MJ Schulte, EE Swartzlander Proceedings of IEEE workshop on VLSI signal processing, 388-396, 1993 | 336 | 1993 |
| The case for GPGPU spatial multitasking JT Adriaens, K Compton, NS Kim, MJ Schulte IEEE International Symposium on High-Performance Comp Architecture, 1-12, 2012 | 274 | 2012 |
| Approximating elementary functions with symmetric bipartite tables MJ Schulte, JE Stine IEEE Transactions on Computers 48 (8), 842-847, 2002 | 234 | 2002 |
| An overview of reconfigurable hardware in embedded systems P Garcia, K Compton, M Schulte, E Blem, W Fu EURASIP Journal on Embedded Systems 2006 (1), 056320, 2006 | 229 | 2006 |
| Decimal multiplication via carry-save addition MA Erle, MJ Schulte Proceedings IEEE International Conference on Application-Specific Systems …, 2003 | 192 | 2003 |
| The symmetric table addition method for accurate function approximation JE Stine, MJ Schulte Journal of VLSI signal processing systems for signal, image and video …, 1999 | 191 | 1999 |
| Hardware designs for exactly rounded elementary functions MJ Schulte, EE Swartzlander IEEE Transactions on Computers 43 (8), 964-973, 2002 | 178 | 2002 |
| Microscaling data formats for deep learning BD Rouhani, R Zhao, A More, M Hall, A Khodamoradi, S Deng, ... arXiv preprint arXiv:2310.10537, 2023 | 161 | 2023 |
| Die-stacked memory device providing data translation GH Loh, BM Beckmann, JM O'Connor, M Ignatowski, MJ Schulte, LR Hsu, ... US Patent 9,135,185, 2015 | 150 | 2015 |
| Decimal multiplication with efficient partial product generation MA Erle, EM Schwarz, MJ Schulte 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 21-28, 2005 | 150 | 2005 |
| High-speed multioperand decimal adders RD Kenney, MJ Schulte IEEE Transactions on Computers 54 (8), 953-963, 2005 | 143 | 2005 |
| Achieving exascale capabilities through heterogeneous computing MJ Schulte, M Ignatowski, GH Loh, BM Beckmann, WC Brantley, ... IEEE Micro 35 (4), 26-36, 2015 | 130 | 2015 |
| Power management system and method for a processor JM O'Connor, J Lee, M Schulte, S Manne US Patent App. 13/628,720, 2014 | 127 | 2014 |
| Analysis of column compression multipliers KC Bickerstaff, EE Swartzlander, MJ Schulte Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 33-39, 2001 | 127 | 2001 |
| Symmetric bipartite tables for accurate function approximation MJ Schulte, JE Stine Proceedings 13th IEEE Sympsoium on Computer Arithmetic, 175-183, 1997 | 126 | 1997 |
| Reduced power dissipation through truncated multiplication MJ Schulte, JE Stine, JG Jansen Proceedings IEEE Alessandro Volta Memorial Workshop on Low-Power Design, 61-69, 1999 | 124 | 1999 |
| Lossless and lossy memory I/O link compression for improving performance of GPGPU workloads V Sathish, MJ Schulte, NS Kim Proceedings of the 21st international conference on Parallel architectures …, 2012 | 122 | 2012 |
| Improving throughput of power-constrained GPUs using dynamic voltage/frequency and core scaling J Lee, V Sathisha, M Schulte, K Compton, NS Kim 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 118 | 2011 |
| Reduced area multipliers KAC Bickerstaff, M Schulte, EE Swartzlander Proceedings of International Conference on Application Specific Array …, 1993 | 115 | 1993 |
| Design and Analysis of an APU for Exascale Computing T Vijayaraghavan, Y Eckert, GH Loh, MJ Schulte, M Ignatowski, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 113 | 2017 |
