| The stanford flash multiprocessor J Kuskin, D Ofelt, M Heinrich, J Heinlein, R Simoni, K Gharachorloo, ... Proceedings of the 21ST annual international symposium on Computer …, 1994 | 1084 | 1994 |
| The performance impact of flexibility in the Stanford FLASH multiprocessor M Heinrich, J Kuskin, D Ofelt, J Heinlein, J Baxter, JP Singh, R Simoni, ... Proceedings of the sixth international conference on Architectural support …, 1994 | 190 | 1994 |
| FLASH vs.(simulated) FLASH: Closing the simulation loop J Gibson, R Kunz, D Ofelt, M Horowitz, J Hennessy, M Heinrich ACM SIGPLAN Notices 35 (11), 49-58, 2000 | 162 | 2000 |
| Systems, Devices, and Methods for Transferring Digital Information A Erlichson, M Heinrich US Patent App. 11/995,629, 2009 | 104 | 2009 |
| The effects of latency, occupancy, and bandwidth in distributed shared memory multiprocessors C Holt, M Heinrich, JP Singh, E Rothberg, J Hennessy Technical Report CSL-TR-95-660, Computer Systems Laboratory, Stanford University, 1995 | 99 | 1995 |
| Cache-coherent distributed shared memory: Perspectives on its development and future challenges J Hennessy, M Heinrich, A Gupta Proceedings of the IEEE 87 (3), 418-429, 2002 | 75 | 2002 |
| Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors V Soundararajan, M Heinrich, B Verghese, K Gharachorloo, A Gupta, ... ACM SIGARCH Computer Architecture News 26 (3), 342-355, 1998 | 74 | 1998 |
| Integrating performance monitoring and communication in parallel computers M Martonosi, D Ofelt, M Heinrich ACM SIGMETRICS Performance Evaluation Review 24 (1), 138-147, 1996 | 66 | 1996 |
| A quantitative analysis of the performance and scalability of distributed shared memory cache coherence protocols M Heinrich, V Soundararajan, J Hennessy, A Gupta IEEE Transactions on Computers 48 (2), 205-217, 2002 | 50 | 2002 |
| Digital system simulation: Methodologies and examples K Olukotun, M Heinrich, D Ofelt Proceedings of the 35th annual Design Automation Conference, 658-663, 1998 | 45 | 1998 |
| The performance and scalability of distributed shared-memory cache coherence protocols MA Heinrich Stanford University, 1999 | 42 | 1999 |
| Leveraging cache coherence in active memory systems D Kim, M Chaudhuri, M Heinrich Proceedings of the 16th international conference on Supercomputing, 2-13, 2002 | 41 | 2002 |
| Using meta-level compilation to check FLASH protocol code A Chou, B Chelf, D Engler, M Heinrich ACM SIGARCH Computer Architecture News 28 (5), 59-70, 2000 | 36 | 2000 |
| SMTp: an architecture for next-generation scalable multi-threading M Chaudhuri, M Heinrich ACM SIGARCH Computer Architecture News 32 (2), 124, 2004 | 33 | 2004 |
| Cache Coherence Protocol Design for Active Memory Systems. M Chaudhuri, D Kim, MA Heinrich PDPTA, 83-89, 2002 | 32 | 2002 |
| Latency, occupancy, and bandwidth in DSM multiprocessors: A performance evaluation M Chaudhuri, M Heinrich, C Holt, JP Singh, E Rothberg, J Hennessy IEEE Transactions on Computers 52 (7), 862-880, 2004 | 27 | 2004 |
| The stanford flash multiprocessor J Kuskin, D Ofelt, M Heinrich, J Heinlein, R Simoni, K Gharachorloo, ... 25 years of the international symposia on Computer architecture (selected …, 1998 | 27 | 1998 |
| Architectural support for uniprocessor and multiprocessor active memory systems D Kim, M Chaudhuri, M Heinrich, E Speight IEEE Transactions on Computers 53 (3), 288-307, 2004 | 24 | 2004 |
| The impact of negative acknowledgments in shared memory scientific applications M Chaudhuri, M Heinrich IEEE Transactions on Parallel and Distributed Systems 15 (2), 134-150, 2004 | 21 | 2004 |
| Hardware/software co-design of the stanford FLASH multiprocessor M Heinrich, D Ofelt, MA Horowitz, J Hennessy Proceedings of the IEEE 85 (3), 455-466, 2002 | 19 | 2002 |
John HennessyStanford UniversityVerified email at stanford.edu
