| On-chip traffic modeling and synthesis for MPEG-2 video applications GV Varatkar, R Marculescu IEEE Transactions on very large scale integration (VLSI) systems 12 (1), 108-119, 2004 | 254 | 2004 |
| Traffic analysis for on-chip networks design of multimedia applications G Varatkar, R Marculescu Proceedings of the 39th annual Design Automation Conference, 795-800, 2002 | 158 | 2002 |
| Communication-aware task scheduling and voltage selection for total systems energy minimization G Varatkar, R Marculescu ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 118 | 2003 |
| Energy-efficient motion estimation using error-tolerance GV Varatkar, NR Shanbhag Proceedings of the 2006 international symposium on low power electronics and …, 2006 | 87 | 2006 |
| With shared microexponents, a little shifting goes a long way B Darvish Rouhani, R Zhao, V Elango, R Shafipour, M Hall, ... Proceedings of the 50th Annual International Symposium on Computer …, 2023 | 84 | 2023 |
| Error-resilient motion estimation architecture GV Varatkar, NR Shanbhag IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (10 …, 2008 | 83 | 2008 |
| Stochastic networked computation GV Varatkar, S Narayanan, NR Shanbhag, DL Jones IEEE transactions on very large scale integration (VLSI) systems 18 (10 …, 2009 | 34 | 2009 |
| Sensor network-on-chip GV Varatkar, S Narayanan, NR Shanbhag, D Jones 2007 International Symposium on System-on-Chip, 1-4, 2007 | 31 | 2007 |
| Resmoe: Space-efficient compression of mixture of experts llms via residual restoration M Ai, T Wei, Y Chen, Z Zeng, R Zhao, G Varatkar, BD Rouhani, X Tang, ... arXiv preprint arXiv:2503.06881, 2025 | 12 | 2025 |
| Computation as estimation: A general framework for robustness and energy efficiency in socs S Narayanan, GV Varatkar, DL Jones, NR Shanbhag IEEE Transactions on Signal Processing 58 (8), 4416-4421, 2010 | 11 | 2010 |
| Computation as estimation: Estimation-theoretic IC design improves robustness and reduces power consumption S Narayanan, GV Varatkar, DL Jones, NR Shanbhag 2008 IEEE International Conference on Acoustics, Speech and Signal …, 2008 | 10 | 2008 |
| Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC GV Varatkar, S Narayanan, NR Shanbhag, DL Jones 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 380-383, 2008 | 8 | 2008 |
| Variation-tolerant motion estimation architecture GV Varatkar, NR Shanbhag 2007 IEEE Workshop on Signal Processing Systems, 126-131, 2007 | 7 | 2007 |
| Early termination technique for LDPC decoder architecture GV Vincent Loncke, Yi Cao US Patent 10,312,937, 2019 | 5* | 2019 |
| Non-linear log-likelihood ratio quantization techniques for ldpc decoder architecture G VARATKAR, V Loncke, TJ Richardson, Y Cao US Patent App. 15/619,232, 2018 | 5 | 2018 |
| Trends in energy-efficiency and robustness using stochastic sensor network-on-a-chip GV Varatkar, S Narayanan, NR Shanbhag, DL Jones Proceedings of the 18th ACM Great Lakes symposium on VLSI, 351-354, 2008 | 4 | 2008 |
| Deeply-pipelined high-throughput LDPC decoder architecture YC Vincent Loncke, Girish Varatkar, Thomas Joseph Richardson US Patent 10,778,371, 2020 | 3 | 2020 |
| On-chip communication analysis for multimedia applications G Varatkar, R Marculescu Proceedings. IEEE International Conference on Multimedia and Expo 2, 185-188, 2002 | 3 | 2002 |
| Energy-efficient and error-tolerant digital design GV Varatkar Coordinated Science Laboratory Report no. UILU-ENG-08-2219, DAC-111, 2008 | 2 | 2008 |
| Sensor networks-inspired low-power robust PN code acquisition S Narayanan, GV Varatkar, DL Jones, NR Shanbhag 2007 Conference Record of the Forty-First Asilomar Conference on Signals …, 2007 | 1 | 2007 |
