| Cnvlutin: Ineffectual-neuron-free deep neural network computing J Albericio, P Judd, T Hetherington, T Aamodt, NE Jerger, A Moshovos ACM SIGARCH Computer Architecture News 44 (3), 1-13, 2016 | 1002 | 2016 |
| Stripes: Bit-serial deep neural network computing P Judd, J Albericio, T Hetherington, TM Aamodt, A Moshovos 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 645 | 2016 |
| Accelerating sparse deep neural networks A Mishra, J Albericio, J Pool, D Stosic, D Stosic, G Venkatesh, C Yu, ... arXiv preprint arXiv:2104.08378, 2021 | 365 | 2021 |
| Bit-pragmatic deep neural network computing J Albericio, A Delmás, P Judd, S Sharify, G O'Leary, R Genov, ... Proceedings of the 50th annual IEEE/ACM international symposium on …, 2017 | 351 | 2017 |
| Doppelgänger: A cache for approximate computing JS Miguel, J Albericio, A Moshovos, NE Jerger Proceedings of the 48th international symposium on microarchitecture, 50-61, 2015 | 178 | 2015 |
| Reduced-precision strategies for bounded memory in deep neural nets P Judd, J Albericio, T Hetherington, T Aamodt, NE Jerger, R Urtasun, ... arXiv preprint arXiv:1511.05236, 2015 | 148 | 2015 |
| Proteus: Exploiting numerical precision variability in deep neural networks P Judd, J Albericio, T Hetherington, TM Aamodt, NE Jerger, A Moshovos Proceedings of the 2016 International Conference on Supercomputing, 1-12, 2016 | 137 | 2016 |
| Tensordash: Exploiting sparsity to accelerate deep neural network training M Mahmoud, I Edo, AH Zadeh, OM Awad, G Pekhimenko, J Albericio, ... 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 104 | 2020 |
| The bunker cache for spatio-value approximation J San Miguel, J Albericio, NE Jerger, A Jaleel 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 75 | 2016 |
| The reuse cache: Downsizing the shared last-level cache J Albericio, P Ibáñez, V Viñals, JM Llabería Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 75 | 2013 |
| Accelerator for deep neural networks P Judd, J Albericio, AD Lascorz, A Moshovos, S Sharify US Patent 10,387,771, 2019 | 73 | 2019 |
| Exploiting Typical Values to Accelerate Deep Learning A Moshovos, J Albericio, P Judd, AD Lascorz, S Sharify, Z Poulos, ... Computer 51 (5), 18-30, 2018 | 56 | 2018 |
| Accelerator for deep neural networks P Judd, J Albericio, AD Lascorz, A Moshovos, S Sharifymoghaddam US Patent 11,423,289, 2022 | 42 | 2022 |
| The inner most loop iteration counter: a new dimension in branch history A Seznec, JS Miguel, J Albericio Proceedings of the 48th International Symposium on Microarchitecture, 347-357, 2015 | 33 | 2015 |
| Exploiting reuse locality on inclusive shared last-level caches J Albericio, P Ibáñez, V Viñals, JM Llabería ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-19, 2013 | 33 | 2013 |
| Neural network accelerator A Moshovos, AD Lascorz, Z Poulos, DM Stuart, P Judd, S Sharify, ... US Patent App. 16/968,678, 2021 | 29 | 2021 |
| Proteus: Exploiting precision variability in deep neural networks P Judd, J Albericio, T Hetherington, T Aamodt, NE Jerger, R Urtasun, ... Parallel Computing 73, 40-51, 2018 | 29 | 2018 |
| Wormhole: Wisely predicting multidimensional branches J Albericio, J San Miguel, NE Jerger, A Moshovos 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 509-520, 2014 | 21 | 2014 |
| ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache J Albericio, R Gran, P Ibánez, V Viñals, JM Llabería ACM Transactions on Architecture and Code Optimization (TACO) 8 (4), 1-20, 2012 | 17 | 2012 |
| Evaluating the memory system behavior of smartphone workloads G Narancic, P Judd, D Wu, I Atta, M Elnacouzi, J Zebchuk, J Albericio, ... 2014 International Conference on Embedded Computer Systems: Architectures …, 2014 | 16 | 2014 |
