| FPGA-based convolutional neural network architecture with reduced parameter requirements M Hailesellasie, SR Hasan, F Khalid, FA Wad, M Shafique 2018 IEEE international symposium on circuits and systems (ISCAS), 1-5, 2018 | 41 | 2018 |
| Mulnet: A flexible cnn processor with higher resource utilization efficiency for constrained devices MT Hailesellasie, SR Hasan IEEE Access 7, 47509-47524, 2019 | 34 | 2019 |
| Intrusion detection in PLC-based industrial control systems using formal verification approach in conjunction with graphs M Hailesellasie, SR Hasan Journal of Hardware and Systems Security 2 (1), 1-14, 2018 | 23 | 2018 |
| A fast FPGA-based deep convolutional neural network using pseudo parallel memories M Hailesellasie, SR Hasan 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 12 | 2017 |
| Vaws: Vulnerability analysis of neural networks using weight sensitivity M Hailesellasie, J Nelson, F Khalid, SR Hasan 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems …, 2019 | 10 | 2019 |
| MulMapper: Towards an automated FPGA-based CNN processor generator based on a dynamic design space exploration M Hailesellasie, SR Hasan, O Ait Mohamed 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 9 | 2019 |
| FPGA Implementation of Multipath FFT for Cognitive Radio M Hailesellasie Institute of Electron Devices and Circuits, University of Ulm, 2015 | | 2015 |
| Architecture with Reduced Parameter Requirements M Hailesellasie, SR Hasan, F Khalid, F Awwad, M Shafique | | |
