| Memory consistency and event ordering in scalable shared-memory multiprocessors K Gharachorloo, D Lenoski, J Laudon, P Gibbons, A Gupta, J Hennessy ACM SIGARCH Computer Architecture News 18 (2SI), 15-26, 1990 | 1843 | 1990 |
| The stanford dash multiprocessor D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ... Computer 25 (3), 63-79, 1992 | 1479 | 1992 |
| The SGI Origin: A ccNUMA highly scalable server J Laudon, D Lenoski ACM SIGARCH Computer Architecture News 25 (2), 241-251, 1997 | 1222 | 1997 |
| The directory-based cache coherence protocol for the DASH multiprocessor D Lenoski, J Laudon, K Gharachorloo, A Gupta, J Hennessy ACM SIGARCH Computer Architecture News 18 (2SI), 148-159, 1990 | 1024 | 1990 |
| The DASH prototype: Implementation and performance D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy ACM SIGARCH Computer Architecture News 20 (2), 92-103, 1992 | 280 | 1992 |
| The DASH prototype: Logic overhead and performance D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy IEEE Transactions on parallel and distributed systems 4 (1), 41-61, 1993 | 275 | 1993 |
| Scalable shared-memory multiprocessing DE Lenoski, WD Weber Elsevier, 2014 | 207 | 2014 |
| High memory capacity DIMM with data and state memory JP Laudon, DE Lenoski, J Manton, ME Anderson US Patent 6,049,476, 2000 | 137 | 2000 |
| Distributing fault indications and maintaining and using a data structure indicating faults to route traffic in a packet switching system DE Lenoski, WN Eatherton, JA Fingerhut, JS Turner US Patent 6,990,063, 2006 | 95 | 2006 |
| Method and apparatus for accumulating and distributing data items within a packet switching system DE Lenoski, JS Turner US Patent 6,735,173, 2004 | 88 | 2004 |
| The design and analysis of DASH: A scalable directory-based multiprocessor DE Lenoski Stanford University, 1992 | 84 | 1992 |
| Apparatus and method for page migration in a non-uniform memory access (NUMA) system JP Laudon, DE Lenoski US Patent 5,727,150, 1998 | 80 | 1998 |
| Measuring memory hierarchy performance of cache-coherent multiprocessors using micro benchmarks C Hristea, D Lenoski, J Keen Proceedings of the 1997 ACM/IEEE conference on Supercomputing, 1-12, 1997 | 80 | 1997 |
| Resequencing packets at output ports without errors using packet timestamps and timestamp floors JS Turner, DE Lenoski US Patent 6,816,492, 2004 | 69 | 2004 |
| Design of scalable shared-memory multiprocessors: The DASH approach D Lenoski, K Gharachorloo, J Laudon, A Gupta, J Hennessy, M Horowitz, ... Digest of Papers Compcon Spring'90. Thirty-Fifth IEEE Computer Society …, 1990 | 58 | 1990 |
| High-memory capacity DIMM with data and state memory JP Laudon, DE Lenoski, J Manton US Patent 5,790,447, 1998 | 57 | 1998 |
| The risk of data corruption in microprocessor-based systems R Horst, D Jewett, D Lenoski FTCS-23 The Twenty-Third International Symposium on Fault-Tolerant Computing …, 1993 | 50 | 1993 |
| System overview of the SGI Origin 200/2000 product line J Laudon, D Lenoski Proceedings IEEE COMPCON 97. Digest of Papers, 150-156, 1997 | 43 | 1997 |
| Frequency-stabilized links for coherent WDM fiber interconnects in the datacenter DJ Blumenthal, H Ballani, RO Behunin, JE Bowers, P Costa, D Lenoski, ... Journal of Lightwave Technology 38 (13), 3376-3386, 2020 | 41 | 2020 |
| Synchronous processor unit with interconnected, separately clocked processor sections which are automatically synchronized for data transfer operations LE Overhouse, DE Lenoski US Patent 5,309,561, 1994 | 37 | 1994 |
