| On the reliability of majority logic structure in quantum-dot cellular automata B Sen, Y Sahu, R Mukherjee, RK Nath, BK Sikdar Microelectronics Journal 47, 7-18, 2016 | 63 | 2016 |
| Design of testable adder in quantum‐dot cellular automata with fault secure logic M Goswami, B Sen, R Mukherjee, BK Sikdar Microelectronics Journal 60, 1-12, 2017 | 62 | 2017 |
| Towards the design of hybrid QCA tiles targeting high fault tolerance B Sen, M Dutta, R Mukherjee, RK Nath, AP Sinha, BK Sikdar Journal of Computational Electronics 15 (2), 429-445, 2016 | 51 | 2016 |
| Novel hardware trojan attack on activation parameters of FPGA-based DNN accelerators R Mukherjee, RS Chakraborty IEEE Embedded Systems Letters 14 (3), 131-134, 2022 | 26 | 2022 |
| A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention R Mukherjee, SR Rajendran, RS Chakraborty Journal of Cryptographic Engineering 12 (4), 495-522, 2022 | 24 | 2022 |
| Efficient design of fault tolerant tiles in QCA B Sen, A Agarwal, RK Nath, R Mukherjee, BK Sikdar 2014 annual IEEE India conference (INDICON), 1-6, 2014 | 20 | 2014 |
| Reliability-aware design for programmable QCA logic with scalable clocking circuit B Sen, MR Chowdhury, R Mukherjee, M Goswami, BK Sikdar Journal of Computational Electronics 16 (2), 473-485, 2017 | 18 | 2017 |
| Evaluating large language models for automatic register transfer logic generation via high-level synthesis S Swaroopa, R Mukherjee, A Debnath, RS Chakraborty arXiv preprint arXiv:2408.02793, 2024 | 13 | 2024 |
| Design of reliable universal QCA logic in the presence of cell deposition defect B Sen, R Mukherjee, K Mohit, BK Sikdar International Journal of Electronics 104 (8), 1285-1297, 2017 | 11 | 2017 |
| Design of fault tolerant universal logic in QCA B Sen, R Mukherjee, RK Nath, BK Sikdar 2014 Fifth International Symposium on Electronic System Design, 166-170, 2014 | 9 | 2014 |
| A processing in memory realization using quantum dot cellular automata (QCA): Proposal and implementation PP Chougule, B Sen, R Mukherjee, PS Patil, RK Kamat, TD Dongale Sumy State University, 2017 | 8 | 2017 |
| Characterization and analysis of single electron fault of QCA primitives R Mukherjee, S Tripathi, S Sen, B Sen 2016 International Conference on Microelectronics, Computing and …, 2016 | 8 | 2016 |
| Sok: Physical and logic testing techniques for hardware trojan detection SR Rajendran, R Mukherjee, RS Chakraborty Proceedings of the 4th ACM Workshop on Attacks and Solutions in Hardware …, 2020 | 6 | 2020 |
| Attacks on recent dnn ip protection techniques and their mitigation R Mukherjee, RS Chakraborty IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 5 | 2023 |
| Probabilistic hardware trojan attacks on multiple layers of reconfigurable network infrastructure R Mukherjee, V Govindan, S Koteshwara, A Das, KK Parhi, ... Journal of Hardware and Systems Security 4 (4), 343-360, 2020 | 4 | 2020 |
| Towards designing reliable universal QCA logic in the presence of cell deposition defect B Sen, RK Nath, R Mukherjee, Y Sahu, BK Sikdar 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 3 | 2016 |
| Security Vulnerabilities in AI Hardware: Threats and Countermeasures R Mukherjee, S Swaroopa, RS Chakraborty 2024 IEEE 33rd Asian Test Symposium (ATS), 1-6, 2024 | 2 | 2024 |
| Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis S Swaroopa, R Mukherjee, A Debnath, RS Chakraborty Foundations and Trends® in Electronic Design Automation 14 (4), 315-337, 2025 | 1 | 2025 |
| HLS-IRT: Hardware Trojan Insertion through Modification of Intermediate Representation During High-Level Synthesis R Mukherjee, A Ghosh, RS Chakraborty ACM Transactions on Design Automation of Electronic Systems 29 (5), 1-23, 2024 | 1 | 2024 |
| APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network P Santikellur, R Mukherjee, RS Chakraborty Proceedings of the 2021 Great Lakes Symposium on VLSI, 89-94, 2021 | 1 | 2021 |
Rajat Subhra ChakrabortyProfessor, Dept. of Computer Science and Engineering, IIT Kharagpur, India - 721302Verified email at cse.iitkgp.ac.in
