| Applications of machine learning techniques in side-channel attacks: a survey B Hettwer, S Gehrer, T Güneysu Journal of Cryptographic Engineering 10, 135-162, 2020 | 159 | 2020 |
| Deep neural network attribution methods for leakage analysis and symmetric key recovery B Hettwer, S Gehrer, T Güneysu Selected Areas in Cryptography–SAC 2019: 26th International Conference …, 2020 | 86 | 2020 |
| Profiled power analysis attacks using convolutional neural networks with domain knowledge B Hettwer, S Gehrer, T Güneysu International Conference on Selected Areas in Cryptography, 479-498, 2019 | 70 | 2019 |
| Lightweight Side-Channel Protection using Dynamic Clock Randomization B Hettwer, K Das, S Leger, S Gehrer, T Güneysu 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 48 | 2020 |
| Encoding Power Traces as Images for Efficient Side-Channel Analysis B Hettwer, T Horn, S Gehrer, T Güneysu 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 39 | 2020 |
| Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs B Hettwer, J Petersen, S Gehrer, H Neumann, T Güneysu 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 260-263, 2019 | 28 | 2019 |
| Side-channel analysis of the xilinx zynq ultrascale+ encryption engine B Hettwer, S Leger, D Fennes, S Gehrer, T Güneysu IACR Transactions on Cryptographic Hardware and Embedded Systems, 279-304, 2021 | 27 | 2021 |
| Method for safeguarding a system-on-a-chip S Gehrer, S Leger US Patent 9,887,844, 2018 | 23 | 2018 |
| Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware B Hettwer, D Fennes, S Leger, J Richter-Brockmann, S Gehrer, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 17 | 2020 |
| Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation S Gehrer, G Sigl 2015 10th International Symposium on Reconfigurable Communication-centric …, 2015 | 16 | 2015 |
| Reconfigurable pufs for fpga-based socs S Gehrer, G Sigl 2014 International Symposium on Integrated Circuits (ISIC), 140-143, 2014 | 16 | 2014 |
| Method for generating a cryptographic key in a system-on-a-chip S Gehrer US Patent 10,547,459, 2020 | 15 | 2020 |
| Highly Efficient Implementation of Physical Unclonable Functions on FPGAs S Gehrer Technische Universität München, 2017 | 15 | 2017 |
| Aging effects on ring-oscillator-based physical unclonable functions on FPGAs S Gehrer, S Leger, G Sigl 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 12 | 2015 |
| Securing cryptographic circuits by exploiting implementation diversity and partial reconfiguration on FPGAs. In 2019 Design, Automation & Test in Europe Conference & Exhibition … B Hettwer, J Petersen, S Gehrer, H Neumann, T Güneysu IEEE, 2019 | 8 | 2019 |
| System and method for network intrusion detection based on physical measurements JG Merchan, S Gehrer, S Jain, SR VANCHEESWARAN, T Lothspeich US Patent 11,683,341, 2023 | 6 | 2023 |
| Area-efficient PUF-based key generation on system-on-chips with FPGAs S Gehrer, G Sigl Journal of Circuits, Systems and Computers 25 (01), 1640002, 2016 | 5 | 2016 |
| System and method for processing a data subject rights request using biometric data matching C Zimmermann, S Trieflinger, FB Durak, S Gehrer US Patent 12,182,301, 2024 | 2 | 2024 |
| System and method for intrusion detection on a physical level using an internal analog to digital converter S Gehrer, JG Merchan, S Jain US Patent 12,189,767, 2025 | 1 | 2025 |
| Learning semantic segmentation models in the absence of a portion of class labels SA Golestaneh, JD Semedo, FJC CONDESSA, WY Lin, S GEHRER US Patent 12,118,788, 2024 | 1 | 2024 |
