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Gulay Yalcin
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Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime
Y Cai, G Yalcin, O Mutlu, EF Haratsch, A Cristal, OS Unsal, K Mai
2012 IEEE 30th International Conference on Computer Design (ICCD), 94-101, 2012
3342012
Neighbor-cell assisted error correction for MLC NAND flash memories
Y Cai, G Yalcin, O Mutlu, EF Haratsch, O Unsal, A Cristal, K Mai
ACM SIGMETRICS Performance Evaluation Review 42 (1), 491-504, 2014
1132014
Error analysis and retention-aware error management for NAND flash memory.
Y Cai, G Yalcin, O Mutlu, EF Haratsch, A Crista, OS Unsal, K Mai
Intel Technology Journal 17 (1), 2013
1082013
Designing and modelling selective replication for fault-tolerant HPC applications
O Subasi, G Yalcin, F Zyulkyarov, O Unsal, J Labarta
2017 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid …, 2017
412017
FIMSIM: A fault injection infrastructure for microarchitectural simulators
G Yalcin, OS Unsal, A Cristal, M Valero
2011 IEEE 29th International Conference on Computer Design (ICCD), 431-432, 2011
392011
FaulTM: Fault-tolerance using hardware transactional memory
G Yalcin, OS Unsal, I Hur, A Cristal Kestelman, M Valero Cortés
PESPMA 2010: Workshop on Parallel Execution of Sequential Programs on Multi …, 2010
332010
FaulTM: error detection and recovery using hardware transactional memory
G Yalcin, O Unsal, A Cristal
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 220-225, 2013
292013
Fault tolerance for multi-threaded applications by leveraging hardware transactional memory
G Yalcin, OS Unsal, A Cristal
Proceedings of the ACM International Conference on Computing Frontiers, 1-9, 2013
282013
Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches
G Yalcin, E Islek, O Tozlu, P Reviriego, A Cristal, OS Unsal, O Ergin
2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 1-6, 2014
222014
A methodology for comparing the reliability of GPU-based and CPU-based HPCs
N Cini, G Yalcin
ACM Computing Surveys (CSUR) 53 (1), 1-33, 2020
182020
Flexicache: Highly reliable and low power cache under supply voltage scaling
G Yalcin, A Seyedi, OS Unsal, A Cristal
Latin American High Performance Computing Conference, 173-190, 2014
152014
Symptomtm: Symptom-based error detection and recovery using hardware transactional memory
G Yalcin, OS Unsal, A Cristal, I Hur, M Valero
2011 International Conference on Parallel Architectures and Compilation …, 2011
152011
A runtime heuristic to selectively replicate tasks for application-specific reliability targets
O Subasi, G Yalcin, F Zyulkyarov, O Unsal, J Labarta
2016 IEEE International Conference on Cluster Computing (CLUSTER), 498-505, 2016
142016
Combining error detection and transactional memory for energy-efficient computing below safe operation margins
G Yalcin, A Sobe, D Harmanci, A Voronin, JT Wamhoff, P Felber, O Unsal, ...
2014 22nd Euromicro International Conference on Parallel, Distributed, and …, 2014
132014
Crc-based memory reliability for task-parallel HPC applications
O Subasi, O Unsal, J Labarta, G Yalcin, A Cristal
2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2016
122016
ParaDIME: Parallel distributed infrastructure for minimization of energy for data centers
SK Rethinagiri, O Palomar, A Sobe, G Yalcin, T Knauth, RT Gil, P Prieto, ...
Microprocessors and microsystems 39 (8), 1174-1189, 2015
102015
Circuit design of a novel adaptable and reliable L1 data cache
A Seyedi, G Yalcin, OS Unsal, A Cristal
Proceedings of the 23rd ACM international conference on Great lakes …, 2013
102013
Leveraging transactional memory for energyefficient computing below safe operation margins
A Cristal, P Felber, C Fetzer, D Harmanci, A Sobe, O Unsal, JT Wamhoff, ...
Proceedings of the 8th ACM SIGPLAN Workshop on Transactional Computing, ser …, 2013
82013
Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm
G Yalcin, SK Rethinagiri, O Palomar, O Unsal, A Cristal, D Milojevic
2016 24th Euromicro International Conference on Parallel, Distributed, and …, 2016
72016
Jsram: A circuit-level technique for trading-off robustness and capacity in cache memories
H Ahangari, G Yalcin, O Ozturk, O Unsal, A Cristal
2015 IEEE Computer Society Annual Symposium on VLSI, 149-154, 2015
72015
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Articles 1–20