| Codes for symbol-pair read channels Y Cassuto, M Blaum IEEE Transactions on Information Theory 57 (12), 8011-8020, 2011 | 172 | 2011 |
| Codes for asymmetric limited-magnitude errors with application to multilevel flash memories Y Cassuto, M Schwartz, V Bohossian, J Bruck IEEE Transactions on Information theory 56 (4), 1582-1595, 2010 | 170 | 2010 |
| Sneak-path constraints in memristor crossbar arrays Y Cassuto, S Kvatinsky, E Yaakobi 2013 IEEE international symposium on information theory, 156-160, 2013 | 158 | 2013 |
| Indirection systems for shingled-recording disk drives Y Cassuto, MAA Sanvido, C Guyot, DR Hall, ZZ Bandic 2010 IEEE 26th Symposium on Mass Storage Systems and Technologies (MSST), 1-14, 2010 | 141 | 2010 |
| Logic operations in memory using a memristive Akers array Y Levy, J Bruck, Y Cassuto, EG Friedman, A Kolodny, E Yaakobi, ... Microelectronics Journal 45 (11), 1429-1437, 2014 | 137 | 2014 |
| Codes for limited magnitude asymmetric errors in flash memories Y Cassuto, J Bruck, M Schwartz, V Bohossian US Patent 8,296,623, 2012 | 124 | 2012 |
| Implementing secure erase for solid state drives C Guyot, ZZ Bandic, Y Cassuto, AM Espeseth, M Sanvido US Patent 8,250,380, 2012 | 91 | 2012 |
| Symbol-pair codes: Algebraic constructions and asymptotic bounds Y Cassuto, S Litsyn 2011 IEEE International Symposium on Information Theory Proceedings, 2348-2352, 2011 | 88 | 2011 |
| Cyclic lowest density MDS array codes Y Cassuto, J Bruck IEEE Transactions on Information Theory 55 (4), 1721-1729, 2009 | 84 | 2009 |
| Information-theoretic sneak-path mitigation in memristor crossbar arrays Y Cassuto, S Kvatinsky, E Yaakobi IEEE Transactions on Information Theory 62 (9), 4801-4813, 2016 | 75 | 2016 |
| Online fountain codes with low overhead Y Cassuto, A Shokrollahi IEEE Transactions on Information Theory 61 (6), 3137-3149, 2015 | 67 | 2015 |
| Codes for multi-level flash memories: Correcting asymmetric limited-magnitude errors Y Cassuto, M Schwartz, V Bohossian, J Bruck 2007 IEEE International Symposium on Information Theory, 1176-1180, 2007 | 57 | 2007 |
| Channel coding for nonvolatile memory technologies: Theoretical advances and practical considerations L Dolecek, Y Cassuto Proceedings of the IEEE 105 (9), 1705-1724, 2017 | 48 | 2017 |
| Burst-erasure correcting codes with optimal average delay N Adler, Y Cassuto IEEE Transactions on Information Theory 63 (5), 2848-2865, 2017 | 47 | 2017 |
| Low complexity encoding for network codes S Jaggi, Y Cassuto, M Effros 2006 IEEE International Symposium on Information Theory, 40-44, 2006 | 43 | 2006 |
| NAND flash architectures reducing write amplification through multi-write codes S Odeh, Y Cassuto 2014 30th Symposium on Mass Storage Systems and Technologies (MSST), 1-10, 2014 | 32 | 2014 |
| Codes for network switches Z Wang, O Shaked, Y Cassuto, J Bruck 2013 IEEE International Symposium on Information Theory, 1057-1061, 2013 | 32 | 2013 |
| Detection and coding schemes for sneak-path interference in resistive memory arrays Y Ben-Hur, Y Cassuto IEEE Transactions on Communications 67 (6), 3821-3833, 2019 | 31 | 2019 |
| Fountain codes with nonuniform selection distributions through feedback M Hashemi, Y Cassuto, A Trachtenberg IEEE Transactions on Information Theory 62 (7), 4054-4070, 2016 | 30 | 2016 |
| Optimal binary switch codes with small query size Z Wang, HM Kiah, Y Cassuto 2015 IEEE International Symposium on Information Theory (ISIT), 636-640, 2015 | 28 | 2015 |
