[go: up one dir, main page]

WO2009108193A1 - Architectural computing tiles - Google Patents

Architectural computing tiles Download PDF

Info

Publication number
WO2009108193A1
WO2009108193A1 PCT/US2008/055142 US2008055142W WO2009108193A1 WO 2009108193 A1 WO2009108193 A1 WO 2009108193A1 US 2008055142 W US2008055142 W US 2008055142W WO 2009108193 A1 WO2009108193 A1 WO 2009108193A1
Authority
WO
WIPO (PCT)
Prior art keywords
architectural
tile
component
computing
tiles
Prior art date
Application number
PCT/US2008/055142
Other languages
French (fr)
Inventor
James A. Whitten
Original Assignee
Hewlett-Packard Development Company, L.P.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett-Packard Development Company, L.P. filed Critical Hewlett-Packard Development Company, L.P.
Priority to PCT/US2008/055142 priority Critical patent/WO2009108193A1/en
Publication of WO2009108193A1 publication Critical patent/WO2009108193A1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/20Cooling means

Definitions

  • Figure 1 illustrates a computer system in accordance with embodiments
  • Figure 2 illustrates an architectural tile version of the computer system of Figure 1 in accordance with embodiments
  • Figure 3 illustrates an interconnection between architectural tiles in accordance with embodiments
  • Figure 4A illustrates a perspective top view of an architectural tile cross- section in accordance with embodiments
  • Figure 4B illustrates a perspective side view of an architectural tile cross- section in accordance with embodiments
  • Figure 5 illustrates an interconnection grid structure for architectural tiles in accordance with embodiments
  • Figure 6 illustrates a method in accordance with embodiments. NOTATION AND NOMENCLATURE
  • architectural tile refers to a segmented covering for floors, roofs, countertops, walls, or other surfaces.
  • Each segmented covering is substantially made out of ceramics and/or some other non-conductive material.
  • Each segmented covering may be decorated using carpet, laminate wood, mosaics, bias reliefs, two- dimensional graphic art forms ⁇ e.g., paintings and prints) or other surfaces that are either attached to or engraved into the covering.
  • Examples of architectural tiles include, but are not limited to, kitchen/bathroom style tiles, modular carpet tiles, and bricks.
  • architectural computing tile refers to the integration of electronic components ⁇ e.g., semiconductors or complete computing devices or systems) within an architectural tile or a tile-like building material during or after the tile manufacturing process. Such tiles are deployable as a construction material for buildings or other architectural structures. Individual or grouped architectural computing tiles can perform storage, networking, processing and/or other computing functions. Grouped architectural computing tiles can be complemented by an interconnect system among the tiles.
  • Embodiments are directed to architectural tiles, where computing components are embedded within the architectural tiles.
  • the architectural tiles are decorative and can be installed on floors or walls. Power lines and communication lines can be provided to each architectural tile to form functional computers or networks of computers. The heat generated by the computing components is used efficiently in homes or offices.
  • Figure 1 illustrates a computer system 100 in accordance with embodiments.
  • each of a plurality of processing components 102A- 102C couple to a respective storage component 104A-104C.
  • Each of the processing components 102A-102C also couples to a respective networking component 106A-106C.
  • the network components 106A-106C couple together and enable communication between the processing components 102A-102C.
  • the computer system 100 represents a single computer with locally coupled components. Alternatively, the computer system 100 represents a single computer with remotely coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some locally coupled components. Alternatively, the computer system 100 represents a plurality of computers with remotely coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some locally coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some remotely coupled components. Communication protocols now known or later developed could be implemented for communication between the various components of the computer system as understood by one of skill in the art. Also, at least some of the components may communicate using wireless transceivers and protocols now known or later developed.
  • FIG. 1 has been simplified to facilitate discussion of a wide variety of computer systems.
  • Most computer systems, whether simple or complex, have one or more storage components, processing components and/or networking components.
  • the computer system 100 is representative of electronic devices such as one or more desktop computers, servers, or other computing systems. As understood by one of skill in the art, such a computer system has various components that could be classified as storage components, processing components and/or networking components. Other well known internal components and peripheral components could be included in the computer system 100 as well.
  • a user interface 108 is included to enable a user to interact with the computer system 100.
  • the user interface 108 represents a monitor or liquid crystal display (LCD), a keyboard, and/or a mouse.
  • LCD liquid crystal display
  • FIG. 1 illustrates an architectural tile version of the computer system 100 of Figure 1 in accordance with embodiments. In other words, at least some of the various components of Figure 1 are embedded into architectural tiles.
  • each of the processing components 102A-102C couple to a respective storage component 104A-104C and to a respective networking component 106A-106C.
  • the network components 106A-106C couple together and enable communication between the processing components 102A-102C.
  • the storage component 104A is embedded into a storage- only architectural tile 202.
  • the storage component 104A primarily functions to store data and could be representative of volatile memory ⁇ e.g., Random Access Memory or RAM) or non-volatile memory (e.g., read-only memory, flash memory and hard drives). Of note is the ongoing miniaturization of hard drives, which would facilitate embedding such a drive into an architectural tile.
  • the storage-only architectural tile 202 contains multiple storage components, which may be of the same type or different types.
  • the architectural computing tile 202 can be the packaging format for emergent solid- state, molecular, organic or 3D crystalline storage methods.
  • the processing component 102A is embedded into a processing-only architectural tile 204.
  • the processing component 102A could be representative of a central processing unit (CPU) or some other application-specific integrated circuit (ASIC) ⁇ e.g., a graphics processor) whose primary function is to process data.
  • the processing-only architectural tile 204 contains multiple processing components, which may be of the same type or different types.
  • the networking component 106A is embedded into a networking-only architectural tile 206.
  • the networking component 106A could be representative of a network interface card (NIC) ⁇ e.g., an Ethernet interface), a peripheral device input/output adapter ⁇ e.g., a Universal Serial Bus controller/adapter), internal input/output bridges ⁇ e.g., a northbridge or southbridge chipset), or a wireless communication module.
  • the wireless communication module may be for short-range communications ⁇ e.g., Bluetooth®), medium-range communications ⁇ e.g., 802.11 "wi-fi" protocols), or long-range communications ⁇ e.g., wide area cellular networks).
  • the networking-only architectural tile 206 contains multiple networking components, which may be of the same type or different types.
  • the processing component 102A, the storage component 104A and the networking component 106A function together even though these components are embedded in separate architectural tiles.
  • the storage-only architectural tile 202, the processing- only architectural tile 204, and the networking-only architectural tile 206 have suitable interconnects as will later be described.
  • the processing component 102B, the storage component 104B and the networking component 106B are embedded together into a single architectural tile 208 (referred to herein as a "complex" tile) that combines processing components, storage components, and networking components to form a computing system.
  • the complex architectural tile 208 could represent, for example, a desktop computer, a server, or other computing system.
  • the complex architectural tile 208 contains multiple processing components, storage components, and/or networking components.
  • the interconnections between the processing component 102B, the storage component 104B and the networking component 106B are embedded into the architectural tile.
  • preexisting wires or groups of wires could be embedded into the architectural tile during the manufacturing process.
  • conductive ⁇ e.g., metal) traces could be deposited on a surface of the architectural tile using known vapor or liquid deposition techniques.
  • a printed circuit board (PCB) having traces could be embedded into an architectural tile.
  • computing components could be attached to the PCB, which could provide suitable interconnections.
  • the processing component 102B, the storage component 104B and the networking component 106B may be part of the same integrated circuit. Such may be the case as circuitry for these components is miniaturized.
  • the storage component 104C is embedded into a storage- only architectural tile 202 as previously explained.
  • the processing component 102C and the networking component 106C are embedded together into a single architectural tile 208 (referred to herein as a "combination" tile) that combines processing components and networking components.
  • a combination architectural tile could combine processing components and storage components.
  • a combination architectural tile could combine networking components and storage components.
  • a combination architectural tile such as the architectural tile 208 combines any two, but not all three types of computing components described herein (processing, storage, networking).
  • the interconnections between the processing component 102C and the networking component 106C may be embedded into each combination architectural tile ⁇ e.g., as wires, groups of wires, metal deposits, or PCB traces).
  • the processing component 102C and the networking component 106B are part of the same integrated circuit. Such may be the case as circuitry for these components is miniaturized.
  • the same discussion applies to the other types of combination architectural tiles mentioned above ⁇ e.g., processing/storage or networking/storage).
  • FIG. 3 illustrates an interconnection between architectural tiles in accordance with embodiments.
  • all of the architectural tiles have power lines 302 (solid lines) and communication lines 304 (dashed lines).
  • data can be transferred over power lines as is known in the art.
  • communication lines 304 can be reduced or omitted.
  • the power lines 302 and the communication lines 304 can extend to each side of an architectural tile as shown.
  • power lines 302 and communication lines 304 can extend from a component embedded in an architectural tile to any one side of the architectural tile.
  • the power lines 302 and communication lines 304 are part of a bus that extends between at least two sides of an architectural tile.
  • power lines 302 and communication lines 304 can be provided for storage-only architectural tiles 202, processing-only architectural tiles 204, networking-only architectural tiles 206, combination architectural tiles 210 or complex architectural tiles 208. Also, power lines 302 and/or communication lines 304 can be provided as part of interconnect architectural tiles 212, which do not have storage components, processing component, or networking components.
  • the various architectural tiles can transmit power and data via direct contact ⁇ e.g., side-to-side contact, or sharing a conductive grid) or indirect contact ⁇ e.g., wireless).
  • the storage-only architectural tiles 202, the processing-only architectural tiles 204, the networking-only architectural tiles 206, and the interconnect architectural tiles 212 are shown as being approximately square with power lines 302 and communication lines 304 that are approximately centered on each side.
  • the shape of these architectural tiles and the location of power lines 302 and communication lines 304 can vary so long as interconnection with other tiles or a conductive grid is possible.
  • the combination architectural tile 210 and the complex architectural tile 208 are shown as being rectangular, but could alternatively have other shapes ⁇ e.g., a square). In other words, the shape of combination architectural tiles and complex architectural tiles and the location of corresponding power lines and communication lines can vary so long as interconnection is possible.
  • FIG. 4A illustrates a perspective top view of an architectural tile cross- section in accordance with embodiments.
  • a computing component 402 e.g., a processing component, a storage component, a networking component, or some combination thereof
  • the computing component 402 may be centered in the architectural tile 406, but could alternatively be off-centered.
  • power/communication buses 404 are shown extending from various edges of the architectural tile 406 to the computing component 402. Each power/communication bus 404 may be redundant or alternatively represents different input/output signals.
  • the location of the power/communication buses 404 can vary as long as interconnection with other architectural tiles and/or a conductive grid is possible.
  • power/communication buses 404 involve wireless interconnects, wired interconnects or a combination of both.
  • Figure 4B illustrates a perspective side view of an architectural tile cross- section in accordance with embodiments.
  • the computing component 402 is shown embedded in the architectural tile 406.
  • the power/communication bus 404 runs underneath the computing component 402.
  • the power/communication bus 404 could run above the computing component 402.
  • the power/communication bus 404 could run along one or more sides of the computing component 402.
  • a decorative surface 408 is placed on top of the architectural tile.
  • the decorative surface 408 is representative of carpet, ceramic tile, laminate wood or other decorative surfaces.
  • Figure 5 illustrates an interconnection grid structure 502 for architectural tiles 406 in accordance with embodiments.
  • the interconnection grid structure 502 comprises intersecting conductive surfaces.
  • the conductive surfaces of the interconnection grid structure 502 contact power lines and/or communication lines of architectural tiles 406 along at least one side edge of each architectural tile. Additionally or alternatively, the conductive surfaces contact power lines and/or communication lines of architectural tiles 406 along a bottom surface or top surface of each architectural tile.
  • the conductive surfaces extend power and communication lines for the architectural tiles 406.
  • the interconnection grid structure 502 holds the architectural tiles 406 in their place.
  • the interconnection grid structure 502 represented in Figure 5 can be part of a weight-bearing raised floor. In such case, at least some power/communication buses can run underneath the raised floor surface. In alternative embodiments, the interconnection grid structure 502 lies directly on a sub-floor surface.
  • Figure 6 illustrates a method 600 in accordance with embodiments.
  • the method 600 comprises embedding at least one computer component in an architectural tile (block 602).
  • the method 600 further comprises providing a power interface and a communication interface for the at least one computer component in the architectural tile (block 604).
  • the method 600 may also comprise interconnecting a plurality of architectural tiles, each architectural tile having at least one computing component.
  • the method 600 may also comprise embedding a processing component, a storage component and/or a networking component in the architectural tile.
  • the method 600 may also comprise embedding at least one of a power line or a communication line within the architectural tile.
  • the method 600 may also comprise embedding at least one of a power line or a communication line on an outer surface of the architectural tile.
  • the method 600 may also comprise providing at least one wireless interface for power or communication.
  • the method 600 also comprises using architectural computing tiles as sources of radiant building heat. Additionally or alternatively, the method 600 comprises recycling heat generated by architectural computing tiles and/or converting heat from the architectural computing tiles to other energy forms ⁇ e.g., using heat pumps). Additionally or alternatively, the method 600 comprises presenting architectural computing tiles as aesthetic art forms. Additionally or alternatively, the method 600 comprises integrating computing infrastructure into a building (architectural) infrastructure.
  • the architectural tiles conserve space and provide heat during use. In some cases, the need for large data center computer rooms could be eliminated. Heat from computing components is recycled and productively applied. Also, buildings can be built and populated with integrated computer systems, storage complexes and other technology assets.
  • Grid and planetary scale computing can take advantage of assets across different buildings and structures. Upgrades are handled by swapping tiles instead of handling sensitive electronics. Computer system delivery can easy pass through low-clearance (or narrow) building entrances and spaces ⁇ e.g., doors, hallways, and aisles).
  • the architectural tiles can be transported in flexible stacks and delivery packages.
  • creatively packaged tiles can be designed and presented as art ⁇ e.g., mosaics, bias reliefs, or two-dimensional graphic art forms such as paintings and prints).
  • architectural computing tiles can be covered with carpet material to form a carpeted floor for an office or other building space.
  • the architectural tiles can be composed of ceramic, organic or other heat-conducing material.
  • dissipated heat can be applied as radiant floor heating or wall heating (i.e., the same architectural tile concept can be applied for walls as well as floors).
  • the only "above-floor" space requirement for certain systems would be for user interfaces 108.
  • Bluetooth® or other close proximity wireless interconnects can be implemented for communications with the user interface 108.
  • the architectural tiles can be directly integrated with the appearance and decor of a building.
  • the architectural tiles can be installed as a sub- floor, which supports a decorative surface. Access to architectural tiles can be from the upper surface (e.g., if the decorative surface is removable) or from underneath (e.g., a crawlspace).

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Floor Finish (AREA)

Abstract

A computer system is provided, the computer system includes an architectural tile and at least one computing component embedded in the architectural tile. The computer system also includes at least one interconnect that connects each computing component to a power line and a communication line.

Description

ARCHITECTURAL COMPUTING TILES
BACKGROUND
[0001] An important feature of computer component packages in the dissipation of heat. For example, computer processor chips are often packaged as ceramic Pin-Grid Arrays (PGAs) or organic laminate packages such as Plastic Pin Grid Arrays (PPGAs) to facilitate heat conduction. Cooling devices can be implemented to conduct heat away from computer component packages. In general, cooling computing chips is expensive and often wastes the heat produced.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] For a detailed description of exemplary embodiments of the invention, reference will now be made to the accompanying drawings in which: [0003] Figure 1 illustrates a computer system in accordance with embodiments; [0004] Figure 2 illustrates an architectural tile version of the computer system of Figure 1 in accordance with embodiments;
[0005] Figure 3 illustrates an interconnection between architectural tiles in accordance with embodiments;
[0006] Figure 4A illustrates a perspective top view of an architectural tile cross- section in accordance with embodiments;
[0007] Figure 4B illustrates a perspective side view of an architectural tile cross- section in accordance with embodiments;
[0008] Figure 5 illustrates an interconnection grid structure for architectural tiles in accordance with embodiments; and [0009] Figure 6 illustrates a method in accordance with embodiments. NOTATION AND NOMENCLATURE
[0010] Certain terms are used throughout the following description and claims to refer to particular system components. As one skilled in the art will appreciate, computer companies may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following discussion and in the claims, the terms "including" and "comprising" are used in an open-ended fashion, and thus should be interpreted to mean "including, but not limited to... ." Also, the term "couple" or "couples" is intended to mean either an indirect, direct, optical or wireless electrical connection. Thus, if a first device couples to a second device, that connection may be through a direct electrical connection, through an indirect electrical connection via other devices and connections, through an optical electrical connection, or through a wireless electrical connection. Also, the term "architectural tile" refers to a segmented covering for floors, roofs, countertops, walls, or other surfaces. Each segmented covering is substantially made out of ceramics and/or some other non-conductive material. Each segmented covering may be decorated using carpet, laminate wood, mosaics, bias reliefs, two- dimensional graphic art forms {e.g., paintings and prints) or other surfaces that are either attached to or engraved into the covering. Examples of architectural tiles include, but are not limited to, kitchen/bathroom style tiles, modular carpet tiles, and bricks. The term "architectural computing tile" refers to the integration of electronic components {e.g., semiconductors or complete computing devices or systems) within an architectural tile or a tile-like building material during or after the tile manufacturing process. Such tiles are deployable as a construction material for buildings or other architectural structures. Individual or grouped architectural computing tiles can perform storage, networking, processing and/or other computing functions. Grouped architectural computing tiles can be complemented by an interconnect system among the tiles.
DETAILED DESCRIPTION
[0011] The following discussion is directed to various embodiments of the invention. Although one or more of these embodiments may be preferred, the embodiments disclosed should not be interpreted, or otherwise used, as limiting the scope of the disclosure, including the claims. In addition, one skilled in the art will understand that the following description has broad application, and the discussion of any embodiment is meant only to be exemplary of that embodiment, and not intended to intimate that the scope of the disclosure, including the claims, is limited to that embodiment.
[0012] Embodiments are directed to architectural tiles, where computing components are embedded within the architectural tiles. In at least some embodiments, the architectural tiles are decorative and can be installed on floors or walls. Power lines and communication lines can be provided to each architectural tile to form functional computers or networks of computers. The heat generated by the computing components is used efficiently in homes or offices. [0013] Figure 1 illustrates a computer system 100 in accordance with embodiments. In Figure 1 , each of a plurality of processing components 102A- 102C couple to a respective storage component 104A-104C. Each of the processing components 102A-102C also couples to a respective networking component 106A-106C. The network components 106A-106C couple together and enable communication between the processing components 102A-102C. In at least some embodiments, the computer system 100 represents a single computer with locally coupled components. Alternatively, the computer system 100 represents a single computer with remotely coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some locally coupled components. Alternatively, the computer system 100 represents a plurality of computers with remotely coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some locally coupled components. Alternatively, the computer system 100 represents a plurality of computers with at least some remotely coupled components. Communication protocols now known or later developed could be implemented for communication between the various components of the computer system as understood by one of skill in the art. Also, at least some of the components may communicate using wireless transceivers and protocols now known or later developed. [0014] Figure 1 has been simplified to facilitate discussion of a wide variety of computer systems. Most computer systems, whether simple or complex, have one or more storage components, processing components and/or networking components. The computer system 100 is representative of electronic devices such as one or more desktop computers, servers, or other computing systems. As understood by one of skill in the art, such a computer system has various components that could be classified as storage components, processing components and/or networking components. Other well known internal components and peripheral components could be included in the computer system 100 as well. In at least some embodiments, a user interface 108 is included to enable a user to interact with the computer system 100. As an example, the user interface 108 represents a monitor or liquid crystal display (LCD), a keyboard, and/or a mouse. Other known or later developed input/output devices can be part of the user interface 108. As shown the user interface 108 couples to one of the network components (e.g., network component 106A). [0015] Figure 2 illustrates an architectural tile version of the computer system 100 of Figure 1 in accordance with embodiments. In other words, at least some of the various components of Figure 1 are embedded into architectural tiles. As previously described, each of the processing components 102A-102C couple to a respective storage component 104A-104C and to a respective networking component 106A-106C. The network components 106A-106C couple together and enable communication between the processing components 102A-102C. [0016] In Figure 2, the storage component 104A is embedded into a storage- only architectural tile 202. The storage component 104A primarily functions to store data and could be representative of volatile memory {e.g., Random Access Memory or RAM) or non-volatile memory (e.g., read-only memory, flash memory and hard drives). Of note is the ongoing miniaturization of hard drives, which would facilitate embedding such a drive into an architectural tile. In some embodiments, the storage-only architectural tile 202 contains multiple storage components, which may be of the same type or different types. Also, the architectural computing tile 202 can be the packaging format for emergent solid- state, molecular, organic or 3D crystalline storage methods. [0017] Similarly, the processing component 102A is embedded into a processing-only architectural tile 204. The processing component 102A could be representative of a central processing unit (CPU) or some other application- specific integrated circuit (ASIC) {e.g., a graphics processor) whose primary function is to process data. In some embodiments, the processing-only architectural tile 204 contains multiple processing components, which may be of the same type or different types.
[0018] Similarly, the networking component 106A is embedded into a networking-only architectural tile 206. The networking component 106A could be representative of a network interface card (NIC) {e.g., an Ethernet interface), a peripheral device input/output adapter {e.g., a Universal Serial Bus controller/adapter), internal input/output bridges {e.g., a northbridge or southbridge chipset), or a wireless communication module. The wireless communication module may be for short-range communications {e.g., Bluetooth®), medium-range communications {e.g., 802.11 "wi-fi" protocols), or long-range communications {e.g., wide area cellular networks). In some embodiments, the networking-only architectural tile 206 contains multiple networking components, which may be of the same type or different types. [0019] In at least some embodiments, the processing component 102A, the storage component 104A and the networking component 106A function together even though these components are embedded in separate architectural tiles. To support such functionality, the storage-only architectural tile 202, the processing- only architectural tile 204, and the networking-only architectural tile 206 have suitable interconnects as will later be described.
[0020] In contrast to the processing component 102A, the storage component 104A and the networking component 106A (which are located in separate architectural tiles), the processing component 102B, the storage component 104B and the networking component 106B are embedded together into a single architectural tile 208 (referred to herein as a "complex" tile) that combines processing components, storage components, and networking components to form a computing system. The complex architectural tile 208 could represent, for example, a desktop computer, a server, or other computing system. In some embodiments, the complex architectural tile 208 contains multiple processing components, storage components, and/or networking components. [0021] In at least some embodiments, the interconnections between the processing component 102B, the storage component 104B and the networking component 106B are embedded into the architectural tile. For examples, preexisting wires or groups of wires could be embedded into the architectural tile during the manufacturing process. Additionally or alternatively, conductive {e.g., metal) traces could be deposited on a surface of the architectural tile using known vapor or liquid deposition techniques. Additionally or alternatively, a printed circuit board (PCB) having traces could be embedded into an architectural tile. In such case, computing components could be attached to the PCB, which could provide suitable interconnections. Additionally, the processing component 102B, the storage component 104B and the networking component 106B may be part of the same integrated circuit. Such may be the case as circuitry for these components is miniaturized.
[0022] In Figure 2, the storage component 104C is embedded into a storage- only architectural tile 202 as previously explained. In contrast, the processing component 102C and the networking component 106C are embedded together into a single architectural tile 208 (referred to herein as a "combination" tile) that combines processing components and networking components. In alternative embodiments, a combination architectural tile could combine processing components and storage components. Alternatively, a combination architectural tile could combine networking components and storage components. In other words, a combination architectural tile such as the architectural tile 208 combines any two, but not all three types of computing components described herein (processing, storage, networking). The interconnections between the processing component 102C and the networking component 106C may be embedded into each combination architectural tile {e.g., as wires, groups of wires, metal deposits, or PCB traces). Alternatively, the processing component 102C and the networking component 106B are part of the same integrated circuit. Such may be the case as circuitry for these components is miniaturized. The same discussion applies to the other types of combination architectural tiles mentioned above {e.g., processing/storage or networking/storage).
[0023] Figure 3 illustrates an interconnection between architectural tiles in accordance with embodiments. As shown in Figure 3, all of the architectural tiles have power lines 302 (solid lines) and communication lines 304 (dashed lines). In some embodiments, data can be transferred over power lines as is known in the art. In such case, communication lines 304 can be reduced or omitted. The power lines 302 and the communication lines 304 can extend to each side of an architectural tile as shown. Alternatively, power lines 302 and communication lines 304 can extend from a component embedded in an architectural tile to any one side of the architectural tile. In some embodiments, the power lines 302 and communication lines 304 are part of a bus that extends between at least two sides of an architectural tile.
[0024] As shown in Figure 3, power lines 302 and communication lines 304 can be provided for storage-only architectural tiles 202, processing-only architectural tiles 204, networking-only architectural tiles 206, combination architectural tiles 210 or complex architectural tiles 208. Also, power lines 302 and/or communication lines 304 can be provided as part of interconnect architectural tiles 212, which do not have storage components, processing component, or networking components. The various architectural tiles can transmit power and data via direct contact {e.g., side-to-side contact, or sharing a conductive grid) or indirect contact {e.g., wireless).
[0025] In Figure 3, the storage-only architectural tiles 202, the processing-only architectural tiles 204, the networking-only architectural tiles 206, and the interconnect architectural tiles 212 are shown as being approximately square with power lines 302 and communication lines 304 that are approximately centered on each side. In alternative embodiments, the shape of these architectural tiles and the location of power lines 302 and communication lines 304 can vary so long as interconnection with other tiles or a conductive grid is possible. Similarly, in Figure 3, the combination architectural tile 210 and the complex architectural tile 208 are shown as being rectangular, but could alternatively have other shapes {e.g., a square). In other words, the shape of combination architectural tiles and complex architectural tiles and the location of corresponding power lines and communication lines can vary so long as interconnection is possible. [0026] Figure 4A illustrates a perspective top view of an architectural tile cross- section in accordance with embodiments. In Figure 4A, a computing component 402 {e.g., a processing component, a storage component, a networking component, or some combination thereof) is embedded in an architectural tile 406. The computing component 402 may be centered in the architectural tile 406, but could alternatively be off-centered. In Figure 4A, power/communication buses 404 are shown extending from various edges of the architectural tile 406 to the computing component 402. Each power/communication bus 404 may be redundant or alternatively represents different input/output signals. The location of the power/communication buses 404 can vary as long as interconnection with other architectural tiles and/or a conductive grid is possible. In various embodiments, power/communication buses 404 involve wireless interconnects, wired interconnects or a combination of both.
[0027] Figure 4B illustrates a perspective side view of an architectural tile cross- section in accordance with embodiments. In Figure 4B, the computing component 402 is shown embedded in the architectural tile 406. The power/communication bus 404 runs underneath the computing component 402. Alternatively, the power/communication bus 404 could run above the computing component 402. Alternatively, the power/communication bus 404 could run along one or more sides of the computing component 402. In Figure 4B, a decorative surface 408 is placed on top of the architectural tile. The decorative surface 408 is representative of carpet, ceramic tile, laminate wood or other decorative surfaces.
[0028] Figure 5 illustrates an interconnection grid structure 502 for architectural tiles 406 in accordance with embodiments. In Figure 5, the interconnection grid structure 502 comprises intersecting conductive surfaces. In at least some embodiments, the conductive surfaces of the interconnection grid structure 502 contact power lines and/or communication lines of architectural tiles 406 along at least one side edge of each architectural tile. Additionally or alternatively, the conductive surfaces contact power lines and/or communication lines of architectural tiles 406 along a bottom surface or top surface of each architectural tile. The conductive surfaces extend power and communication lines for the architectural tiles 406. In some embodiments, the interconnection grid structure 502 holds the architectural tiles 406 in their place.
[0029] The interconnection grid structure 502 represented in Figure 5 can be part of a weight-bearing raised floor. In such case, at least some power/communication buses can run underneath the raised floor surface. In alternative embodiments, the interconnection grid structure 502 lies directly on a sub-floor surface.
[0030] Figure 6 illustrates a method 600 in accordance with embodiments. The method 600 comprises embedding at least one computer component in an architectural tile (block 602). The method 600 further comprises providing a power interface and a communication interface for the at least one computer component in the architectural tile (block 604).
[0031] In at least some embodiments, the method 600 may also comprise interconnecting a plurality of architectural tiles, each architectural tile having at least one computing component. The method 600 may also comprise embedding a processing component, a storage component and/or a networking component in the architectural tile. The method 600 may also comprise embedding at least one of a power line or a communication line within the architectural tile. The method 600 may also comprise embedding at least one of a power line or a communication line on an outer surface of the architectural tile. The method 600 may also comprise providing at least one wireless interface for power or communication.
[0032] In various embodiments, the method 600 also comprises using architectural computing tiles as sources of radiant building heat. Additionally or alternatively, the method 600 comprises recycling heat generated by architectural computing tiles and/or converting heat from the architectural computing tiles to other energy forms {e.g., using heat pumps). Additionally or alternatively, the method 600 comprises presenting architectural computing tiles as aesthetic art forms. Additionally or alternatively, the method 600 comprises integrating computing infrastructure into a building (architectural) infrastructure. [0033] The embodiments described herein provide various benefits. For example, the architectural tiles conserve space and provide heat during use. In some cases, the need for large data center computer rooms could be eliminated. Heat from computing components is recycled and productively applied. Also, buildings can be built and populated with integrated computer systems, storage complexes and other technology assets. Grid and planetary scale computing can take advantage of assets across different buildings and structures. Upgrades are handled by swapping tiles instead of handling sensitive electronics. Computer system delivery can easy pass through low-clearance (or narrow) building entrances and spaces {e.g., doors, hallways, and aisles). In general, the architectural tiles can be transported in flexible stacks and delivery packages. In some embodiments, creatively packaged tiles can be designed and presented as art {e.g., mosaics, bias reliefs, or two-dimensional graphic art forms such as paintings and prints). Furthermore, architectural computing tiles can be covered with carpet material to form a carpeted floor for an office or other building space. [0034] The architectural tiles can be composed of ceramic, organic or other heat-conducing material. In at least some embodiments, dissipated heat can be applied as radiant floor heating or wall heating (i.e., the same architectural tile concept can be applied for walls as well as floors). The only "above-floor" space requirement for certain systems would be for user interfaces 108. Alternatively, Bluetooth® or other close proximity wireless interconnects can be implemented for communications with the user interface 108. In either case, the architectural tiles can be directly integrated with the appearance and decor of a building. [0035] In some embodiments, the architectural tiles can be installed as a sub- floor, which supports a decorative surface. Access to architectural tiles can be from the upper surface (e.g., if the decorative surface is removable) or from underneath (e.g., a crawlspace). As upgrades are needed, architectural tiles can be replaced in a modular fashion. [0036] The above discussion is meant to be illustrative of the principles and various embodiments of the present invention. Numerous variations and modifications will become apparent to those skilled in the art once the above disclosure is fully appreciated. It is intended that the following claims be interpreted to embrace all such variations and modifications.

Claims

CLAIMS What is claimed is:
1. A computing system, comprising: an architectural tile; at least one computing component embedded in the architectural tile; and at least one interconnect that connects each computing component to a power line and a communication line.
2. The computing system of claim 1 wherein the at least one computing component comprises a processing component.
3. The computing system of claim 1 wherein the at least one computing component comprises a networking component.
4. The computing system of claim 1 wherein the at least one computing component comprises a storage component.
5. The computing system of claim 1 further comprising a plurality of interconnected architectural tiles, each architectural tile having at least one computing component.
6. The computing system of claim 5 further comprising at least one interconnect tile that transmits power and communications between architectural tiles with computing components.
7. The computing system of claim 1 wherein the at least one interconnect extends to a bottom edge of the architectural tile.
8. The computing system of claim 7 further comprising a conductive grid that interfaces with the bottom edge of the architectural tile to extend each power line and communication line to the conductive grid.
9. The computing system of claim 1 wherein the at least one interconnect extends to a side edge of the architectural tile.
10. The computing system of claim 9 further comprising a conductive grid that interfaces with the side edge of the architectural tile to extend each power line and communication line to the conductive grid.
1 1. The computing system of claim 1 wherein the architectural tile has a decorative surface.
12. The computing system of claim 1 further comprising at least one management console coupled to the at least one computing component, the manage console provides a user interface.
13. A method, comprising: embedding at least one computer component in an architectural tile; and providing power and communication interfaces for the at least one computer component in the architectural tile.
14. The method of claim 13 further comprising interconnecting a plurality of architectural tiles, each architectural tile having at least one computing component.
15. The method of claim 13 wherein embedding at least computer component comprises embedding at least one of a processing component, a storage component, and a networking component.
16. The method of claim 13 wherein providing power and communication interfaces for the at least one computer component comprises embedding at least one of a power line or a communication line within the architectural tile.
17. The method of claim 13 wherein providing power and communication interfaces for the at least one computer component comprises providing at least one wireless interface for power or communication.
18. The method of claim 13 further comprising using the architectural tile as a source of radiant building heat.
19. The method of claim 13 further comprising converting heat generated by the architectural tile into another energy form.
20. The method of claim 13 further comprising providing a decorative surface for the architectural tile.
21. The method of claim 13 further comprising integrating the architectural tile into a building infrastructure.
PCT/US2008/055142 2008-02-27 2008-02-27 Architectural computing tiles WO2009108193A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/US2008/055142 WO2009108193A1 (en) 2008-02-27 2008-02-27 Architectural computing tiles

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2008/055142 WO2009108193A1 (en) 2008-02-27 2008-02-27 Architectural computing tiles

Publications (1)

Publication Number Publication Date
WO2009108193A1 true WO2009108193A1 (en) 2009-09-03

Family

ID=41016383

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/055142 WO2009108193A1 (en) 2008-02-27 2008-02-27 Architectural computing tiles

Country Status (1)

Country Link
WO (1) WO2009108193A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997005663A1 (en) * 1995-07-28 1997-02-13 Seibold Hans K Converter for generating electric energy (hot-cold current-generating element)
US6340957B1 (en) * 1997-08-29 2002-01-22 Xerox Corporation Dynamically relocatable tileable displays
US7088581B2 (en) * 2002-07-23 2006-08-08 Silicon Graphics, Inc. External fan and method for exchanging air with modular bricks in a computer system
US20060241878A1 (en) * 2002-12-10 2006-10-26 Infineon Technologies Ag Surface paneling module, surface paneling module arrangement and method for determining the distence of surface paneling modules of the surface paneling module arrangement to at least one reference position, processor arrangement, textile fabric structure and surface paneling structure
US20070241772A1 (en) * 2005-03-15 2007-10-18 Herman Schmit Embedding memory within tile arrangement of a configurable ic

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997005663A1 (en) * 1995-07-28 1997-02-13 Seibold Hans K Converter for generating electric energy (hot-cold current-generating element)
US6340957B1 (en) * 1997-08-29 2002-01-22 Xerox Corporation Dynamically relocatable tileable displays
US7088581B2 (en) * 2002-07-23 2006-08-08 Silicon Graphics, Inc. External fan and method for exchanging air with modular bricks in a computer system
US20060241878A1 (en) * 2002-12-10 2006-10-26 Infineon Technologies Ag Surface paneling module, surface paneling module arrangement and method for determining the distence of surface paneling modules of the surface paneling module arrangement to at least one reference position, processor arrangement, textile fabric structure and surface paneling structure
US20070241772A1 (en) * 2005-03-15 2007-10-18 Herman Schmit Embedding memory within tile arrangement of a configurable ic

Similar Documents

Publication Publication Date Title
US20120147558A1 (en) Scalable electronics, computer, router, process control and other module/enclosures employing approximated tesselation(s)/tiling(s) or electronics and other modules from tow modules to columns, rows and arrays with optional deployment utilizing palletization for build out of existing industrial space and/or new construction with nestable wiring applicable from module and assembly level to molecular and atomic levels
King et al. Robotic tile placement: Tools, techniques and feasibility
US12271346B2 (en) Layer mapping
EP1643324A3 (en) Integrated Building Environment Data System
CN102033848A (en) SOA-based three-dimensional design system integrating method and system
EP1492001A3 (en) Software image creation in a distributed build environment
EP4499933A1 (en) A 3-dimensional printed structure and a system and method for the 3-dimensional printing of structures
CN101432489A (en) Full-function frame structure building prefabrication system, prefabricated building structure and assembly method thereof
EP1372073A3 (en) Mapping service demands in a distributed computer system
EP1132866A3 (en) Three-dimensional topology-based CAD system
AU2018205187A1 (en) Configuring terminal devices
CA2624192A1 (en) Method and apparatus for importing data into program code
JP2001521087A (en) Flooring system
US20190371069A1 (en) System and method for haptic mapping of a configurable virtual reality environment
CN102650173A (en) Modular data center and configuration method thereof
CN112101908A (en) Fully-prefabricated nondestructive assembly type decoration construction method
WO2009108193A1 (en) Architectural computing tiles
Rocha et al. Why is product modularity underdeveloped in construction?
JPS6040472A (en) flooring for wiring
CN202767578U (en) Modular data center
US20220188476A1 (en) System and Method for Automatically Generating an Optimized Building Floor Plate Layout
Jeong Comparison of quasi-unit-cell models to Penrose-tile models for decagonal quasicrystals
CN217580633U (en) Environment-friendly heat preservation wallboard of outer wall face
Carbone et al. Evaluating the Utility Core in the Prefabricated Building Industry–past, present and future
HK1033070A2 (en) An antistatic floor

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08730854

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08730854

Country of ref document: EP

Kind code of ref document: A1