WO2009025092A1 - Low density parity check code check matrix generating method and low density parity check code check matrix generating apparatus - Google Patents
Low density parity check code check matrix generating method and low density parity check code check matrix generating apparatus Download PDFInfo
- Publication number
- WO2009025092A1 WO2009025092A1 PCT/JP2008/002283 JP2008002283W WO2009025092A1 WO 2009025092 A1 WO2009025092 A1 WO 2009025092A1 JP 2008002283 W JP2008002283 W JP 2008002283W WO 2009025092 A1 WO2009025092 A1 WO 2009025092A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- low density
- density parity
- matrix
- matrix generating
- parity check
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
- H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
- H03M13/1188—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal wherein in the part with the double-diagonal at least one column has an odd column weight equal or greater than three
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Abstract
To provide a low density parity check (LDPC) code check matrix generating method and others wherein the performance of the repetitive decoding process can be improved without occurrence of cycles while maintaining the linearity of the coding complexity with respect to the matrix size. The method comprises the steps of using a unit matrix of zxz, where z is a natural number, to extend an element of '1' in a part corresponding to a check bit in a basis matrix having a Zig-zag structure; and using a sub-matrix of zxz, in which only the elements on the sub-diagonal line are '1' and the other elements are '0', to extend the last element of a column corresponding to the first check bit in the basis matrix, thereby obtaining a low density parity check code check matrix.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101427926A CN101373976A (en) | 2007-08-23 | 2007-08-23 | Method and device for generating LDPC check matrix |
| CN200710142792.6 | 2007-08-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2009025092A1 true WO2009025092A1 (en) | 2009-02-26 |
Family
ID=40378001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2008/002283 WO2009025092A1 (en) | 2007-08-23 | 2008-08-22 | Low density parity check code check matrix generating method and low density parity check code check matrix generating apparatus |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN101373976A (en) |
| WO (1) | WO2009025092A1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011515036A (en) * | 2008-02-18 | 2011-05-12 | サムスン エレクトロニクス カンパニー リミテッド | Channel encoding and decoding apparatus and method in communication system using low density parity check code |
| CN102723956A (en) * | 2012-05-25 | 2012-10-10 | 华中科技大学 | Method for generating low density parity check (LDPC) code |
| US8291282B2 (en) | 2008-02-18 | 2012-10-16 | Samsung Electronics Co., Ltd | Apparatus and method for encoding and decoding channel in a communication system using low-density parity-check codes |
| CN114050835A (en) * | 2021-11-11 | 2022-02-15 | 东南大学 | RS code encoding method based on parity check precoding |
| WO2025185554A1 (en) * | 2024-03-04 | 2025-09-12 | 华为技术有限公司 | Encoding and decoding methods for ldpc and related apparatuses, device, and storage medium |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103731160B (en) * | 2014-01-09 | 2016-08-17 | 西安电子科技大学 | Packet space coupling low density parity check coding method |
| JP6798754B2 (en) * | 2016-07-20 | 2020-12-09 | ホアウェイ・テクノロジーズ・カンパニー・リミテッド | Methods and equipment for generating basis matrices for low density parity check codes |
| CN108134611A (en) * | 2017-12-14 | 2018-06-08 | 重庆邮电大学 | A kind of low error floor QC-LDPC code structural schemes using ACE and Zig-Zag |
| EP3718216A1 (en) | 2017-12-15 | 2020-10-07 | Huawei Technologies Co., Ltd. | Design of base parity-check matrices for ldpc codes that have subsets of orthogonal rows |
| CN108566212A (en) * | 2018-05-03 | 2018-09-21 | 重庆邮电大学 | A kind of low error floor QC-LDPC code structural schemes using EETS and Zig-Zag |
| CN109766214A (en) * | 2019-04-01 | 2019-05-17 | 苏州中晟宏芯信息科技有限公司 | A kind of optimal H-matrix generation method and device |
| CN110224703B (en) * | 2019-05-31 | 2020-11-17 | 华中科技大学 | Quasi-cyclic matrix and construction method thereof |
| CN115118288A (en) * | 2022-07-28 | 2022-09-27 | 南京信息工程大学 | A SC-LDPC code with a block diagonal structure and its construction method and system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006157926A (en) * | 2004-12-01 | 2006-06-15 | Samsung Electronics Co Ltd | Method and apparatus for generating low density parity check code |
-
2007
- 2007-08-23 CN CNA2007101427926A patent/CN101373976A/en active Pending
-
2008
- 2008-08-22 WO PCT/JP2008/002283 patent/WO2009025092A1/en active Application Filing
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006157926A (en) * | 2004-12-01 | 2006-06-15 | Samsung Electronics Co Ltd | Method and apparatus for generating low density parity check code |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011515036A (en) * | 2008-02-18 | 2011-05-12 | サムスン エレクトロニクス カンパニー リミテッド | Channel encoding and decoding apparatus and method in communication system using low density parity check code |
| US8291282B2 (en) | 2008-02-18 | 2012-10-16 | Samsung Electronics Co., Ltd | Apparatus and method for encoding and decoding channel in a communication system using low-density parity-check codes |
| CN102723956A (en) * | 2012-05-25 | 2012-10-10 | 华中科技大学 | Method for generating low density parity check (LDPC) code |
| CN102723956B (en) * | 2012-05-25 | 2015-03-11 | 华中科技大学 | Method for generating low density parity check (LDPC) code |
| CN114050835A (en) * | 2021-11-11 | 2022-02-15 | 东南大学 | RS code encoding method based on parity check precoding |
| WO2025185554A1 (en) * | 2024-03-04 | 2025-09-12 | 华为技术有限公司 | Encoding and decoding methods for ldpc and related apparatuses, device, and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101373976A (en) | 2009-02-25 |
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