WO1998016038A1

WO1998016038A1 - Network configuration at high transmission loads

Info

Publication number: WO1998016038A1
Application number: PCT/SE1997/001671
Authority: WO
Inventors: Jürgen SAUERMANN
Original assignee: Telefonaktiebolaget Lm Ericsson
Priority date: 1996-10-10
Filing date: 1997-10-07
Publication date: 1998-04-16
Also published as: SE507754C2; SE9603708D0; SE9603708L; AU4641597A

Abstract

This invention relates to re-routing traffic in high data rate transmission networks and solves the problem with capacity limitations in such networks. The problem is solved by setting up additional virtual circuits, so called alternate circuits. These alternate circuits are used whenever the outgoing data link becomes overloaded due to concurrent bursts on one or more of original or the alternate circuits. Such a network (300) consists of the original circuit and the alternate circuits: the original circuit, which are the nodes (202-212) having links (214-222) between them; the alternate circuits, which are nodes (302, 306 and 304) having alternate links (308-314 and 316, 318) between them. Each node in the network has incoming/outgoing burst detectors and arbiters controlling the node.

Description

NETWORK CONFIGURATION AT HIGH TRANSMISSION LOADS

TECHNICAL FIELD OF THE INVENTION

The present invention relates to a routing technology for switching systems, more particular to re-routing traffic at high transmission loads in a data network or a telecommunication network.

DESCRIPTION OF RELATED ART

ATM (Asynchronous Transfer Mode) is a technique for data transmission used in the SDH (Synchronous Digital Hierarchy) as well as on fibre optic data links. In contrast to synchronous techniques, ATM is a packet oriented transmission mode. The data packets have a fixed size and are called cells. The ATM technology allows various channels to share the bandwidth on one data link.

In principle the ATM as well as the synchronous techniques are time-multiplex, a given set of data channels over one data link. In the STM-1 structure 100, Fig. la, for instance, each data channel is associated with one or more fixed time slot(s), where the data of that channel is transmitted over the data link. Each periodic frame 102, 114 in the STM-1 consists of a framing part ' F' 104 and several channel parts, 106-112. The STM-1 structure is only efficient for the data channels whose bandwidth requirements do not vary in time, such as the 64 kBit/s telephony channels. Instead the ATM structure 120, Fig. lb, has no fixed time slot for a given data channel. The information of each of the data channels are packed into fixed-sized ATM cells, 122-128. The ATM cell 128 consists of a header, 130, and a payload, 132. The payload, 132, contains the data which are to be transmitted. The header, 130, consists of the information concerning the routing such as GFC (generic flow control) 134, VPI (Virtual Path Identifier) 136, VCI (Virtual Circuit Identifier) 138, PT (payload type) 140, CLP (call loss priority) 142, and HEC (header error check) 144. These cells, 122-128, are transmitted one after the other in an order, which is determined by some multiplexing algorithm. For every data channel, that algorithm preserves the order of transmission, this is referred to as in-sequence delivery of the cells belonging to the channel. The multiplexing algorithm may otherwise be chosen freely in order to meet the requirements of the data channels.

In general, the ATM is not only used to multiplex various channels over a single data link, but also to build networks, see Fig. 2. Such a network, 200, consists of several ATM nodes 202-212, and various data links, 214-224, between them. In order to transport the data from a source Xo 202 to a destination Xk 212 there are usually some intermediate nodes Xl,...,Xk-l 204-210 used, i.e. the data are transmitted from Xo, via Xi,...,Xk-lr to X , by means of the data links 214- 222. The destination Xk is also referred to as the far end.

Before the data can be transmitted from Xo to Xk, a mapping mj has to be established in each node Xj of the intermediate nodes Xl,...,Xk-l- Let Ij be the set of the incoming data links and let Oj be the set of the outgoing data links of, for instance, a particular intermediate node Xj . Let V be the set of all the possible VPI/VCI pairs, i.e. V is defined by the ATM cell header format, and let mj ₇ IjχV-»OjχV, be the mapping in node Xj . Then, as long as the mapping mj is established in node Xj , every ATM cell entering the node Xj with a VPI/VCI value veV on the incoming data link ielj _ls switched into the outgoing data link oeOj with a new VPI/VCI value weV. The outgoing data link o and the new VPI/VCI value w are defined by the mapping mj (i, v) = (o, w) . This way the sequence mi, ... ,mk-l of mappings defines the way along which all the ATM cells leaving Xo with a particular VPI/VCI pair will be transported. The modification of the mapping mι,...,mk-l in order to transport the ATM cells along the given set of intermediate nodes and the links between them is a management procedure referred to as establishment of a virtual circuit (VC) from the Xo to Xk- If the virtual circuit is no longer used, it is released, i.e. the mappings mi, ... ,mk-l are modified accordingly.

In general, the mapping mj may be arbitrarily chosen. For some nodes, however, the mapping is restricted in such a way that only the VPI part of the ATM cell header can be modified by the mapping while the VCI part remains unchanged. This leads to simpler nodes, since the tables that implement the mapping mj can be significantly smaller. Such nodes are called virtual path nodes as opposed to virtual circuit nodes. The present invention applies to both kind of switches, but for simplicity only virtual circuit switches are considered.

As already stated above, the advantages of the ATM over synchronous techniques is that the ATM allows several virtual channels to share the bandwidth of the physical links. The virtual circuits in the ATM play the role of time slots in the synchronous techniques. The important difference between the synchronous techniques and the ATM is that virtual circuits in the ATM use only the bandwidth actually required in order to transport the information while the time slots, e.g. in the STM-1, use the bandwidth reserved for the time slots even if no information is transmitted. That is, in case no information is available for transmission, in ATM simply no cells are transmitted while in a STM-1 frame the time slot(s) are nevertheless used for the corresponding data channel. Thus, in principle ATM allows for significantly better utilisation of the data link in case the bandwidth required by the data channels varies in time. This is referred to as switching variable bandwidth.

A serious problem in switching variable bandwidth is the limited capacity of the outgoing data links and that may prevent exploitation of the advantages of the ATM over the synchronous techniques. In order to explain this problem, as well as prior approaches to deal with the problem, some definitions and notations are required, see Fig. 5. Let N={θ,l,...} be the set of non-negative integers. An interval A=[a,b] is the subset {a, a+1, ... ,b} of N. Let f:N-»N be an arbitrary function and let αeN. Then an interval B=[a,b] is called a burst of f with respect to α if f(a-l)<α, f (t)>α for all teB and f(b+l)<α. If the parameter α is not relevant, then B is simply called a burst of f. The sum f (a) +f (a+1) +... +f (b) is called the energy of the burst. In the following, the function f will describe the variation of bandwidth in time. That is, f(t) is the number of ATM cells at time t. The parameter α is the bandwidth reserved for transmitting ATM cells independently of time. Thus B is a burst means that the bandwidth actually required by some data channel or data link is above the bandwidth reserved for it during interval B.

Using this terminology, the problem in switching variable bandwidth can be stated as follows. A given outgoing data link oeOj of some node Xj needs to transmit the ATM cells of various incoming virtual circuits of different data links as defined by the mapping mj . For each virtual circuit c some bandwidth αc is reserved when the virtual circuit is established, the bandwidth α_c is the same in each intermediate node along the virtual circuit c. Also, when the virtual circuit is established, it is ensured by the according management procedure, that the sum of the bandwidths of all virtual circuits routed into the same outgoing data link is less or equal to the bandwidth provided by that link. As long as f_c(t)≤ccc for every virtual channel c routed into a given outgoing data link, there is no problem, since the capacity of the outgoing link is large enough to transmit the cells immediately. The problem occurs if f_c(t)> αc for at least one virtual channel c.

Several prior approaches have been taken to solve this problem. One approach has been to depend on probability theory. Let fi, f2,...,fn be the bandwidth required by virtual circuits c _ι , ... , cn routed into the same outgoing link and let 0.1,0:2, .. ,ocn be the corresponding reserved bandwidths. Then it is known from probability theory, that in a particular sense the sum f=fι+...+fn is "less bursty" with respect to the sum of the reserved bandwidth α=αι+...+α_n than its terms, since the bursts rarely occur at the same time. Therefore the problem is assumed to solve itself so that no measures need to be taken. A major condition for this is the independence of the terms fi . There is at least one application for the ATM, namely "video on demand", where this condition is not fulfilled. In addition, it is not possible to guarantee a high quality of service based on this assumption. Finally, it is not. well understood how to choose αi for a given fi.

Another approach has been peak rate allocation, which means that a parameter a is chosen so large that f(t)≤a for all t. As a consequence, there are no bursts by definition. On the other hand, this is as inefficient as the synchronous techniques since for a bursty data channel significantly more bandwidth is reserved than actually required. This bandwidth is thus not available when setting up other virtual circuits. Peak rate allocation is the approach mainly used today.

Another approach has been buffering. It refers to storing the data, i.e. bursts, when the capacity of the outgoing link is exceeded. This results in a delay which often can not be tolerated. In addition the buffering in one node creates even bigger bursts in the following one. Due to this fact, the dimensioning of the buffers is also a problem. The ATM node does not have any information about the applications using it. Therefore the node knows nothing about the traffic that it switches. Dimensioning the buffers properly would, however, require such knowledge.

Another approach has been flow control that temporarily limits the amount of the data produced by a source. In this context it can be considered as buffering at the source, so that the same problems as for the buffering approach occur. In addition larger buffers are also required, due to the large amount of the data already on the way on the data link before the flow control command is able to stop the source .

Another approach has been re-transmission. If the outgoing data link capacity is exceeded, the data is thrown away and the source is asked for re-transmission. In this context this is just another kind of the flow control approach with even bigger disadvantages, since the overall traffic is increased, because of sending and re-sending.

Another approach has been assigning priorities. The virtual circuits are given priorities, based on CLP 142 and/or the VPI field of the ATM header. If the outgoing data link capacity is exceeded, cells of low priority paths are discarded. This technique is usually combined with other techniques, since it does not solve any problems at all. The lowest priority is given to the data off-line traffic which is not time critical. This technique avoids having to throw away the ATM cells. However, the amount of off-line traffic may be limited, so that the efficient use of the data links is questionable. Also off-line traffic is offered at lower prices, so that there is an economical disadvantage, even if the data link is fully utilised. Again flow control is required in order to switch the off-line traffic on and off if the available bandwidth changes.

Another approach has been congestion control in telecommunication networks. This approach is practical to use if different routes for calls in an area of the network are congested. Today, in video transmission, data compression of video is achieved by searching for similarities both within a video frame, infra-frame compression, and between subsequent video frames, inter- frame compression. In the case of inter- frame compression, instead of whole video frames only changes from the previous one are transmitted. This dramatically reduces the amount of information transmitted, except when the frame differs completely from the previous one, a scene change. Unfortunately the scene change does not only create a huge amount of data, but the data of the scene change is also very important since the subsequent frames require this information in order to be reconstructed.

The US patent 5,241,534, Katsuni et . al . deals with faults in the network, the decision to change links is made by means of a faultdetector. Fault basically means that no cells are received. The patent also describes that faults are detected on a link basis (i.e. a link fails), which a rerouting path is set to replace an original path when a false is generated in the original path within the network.

SUMMARY OF THE INVENTION

The present invention is aimed to solve the problem with capacity limitations in ATM nodes involving when to send data on the outgoing links at high transmission rate.

One field of this invention is in compressed video information, where bandwidths change with time.

The invention discussed here applies to virtual path ATM switches as well as to virtual circuit ATM switches, but for simplicity assume a virtual circuit ATM switch throughout this description.

In an ATM network, virtual circuits are set up and released by means of management procedures in order to control the routing of ATM cells in the network. These virtual circuits are called original circuits. This invention is to set up additional virtual circuits, called alternate circuits, in the ATM network. These alternate circuits are used whenever the outgoing data link becomes overloaded due to the concurrent bursts on one or more of the original or alternate circuits. More precisely, the establishment of the alternate circuits will require very little additional bandwidth due to the signalling overhead. The term virtual circuits is used below if the distinction between original and alternate circuits is not relevant.

As an example of the problem solved by this invention, consider an original circuit ci that requires bandwidth fη_ and for which bandwidth a has been reserved. Assume a second original circuit C2 routed into the same outgoing link of some node that requires bandwidth ±2 and for which bandwidth has been reserved as well. For simplicity, assume that no other virtual circuits are involved. Let β be the bandwidth of the outgoing link, link capacity, see Fig. 5. Let Bη_=[a,b] respective B2=[a,b] be two concurrent bursts of fη_ respective 2 with respect to α, the reserved bandwidth, each having an energy of β(b-a) . The two bursts together have an energy of 2β(b-a) with respect to 2α. During the burst, the bandwidth required would be 2β, while the link can only provide bandwidth β . Without using the invention, the only alternatives are to either discard cells or to buffer cells until the bursts have finished. The latter alternative would thus create a burst with energy 2β(b-a) at the next node. With this invention, one of the bursts would instead be routed along an alternate circuit ather than discarding cells or buffering them. In contrast to synchronous methods, the alternate circuits established in ATM require no additional bandwidth.

This invention can also be seen from a different point of view. Considering a data link, the bandwidth of the link can be shared between virtual circuits transported over that link, but the link capacity is the ultimate bandwidth limit. When using this invention, this limit is no longer the capacity of a single link but the capacity of all (outgoing) links. This is further on referred to as logically extending the link.

Theoretically there might be an alternate circuit for every other outgoing data link of a particular node, but in practice there are fewer of the alternate circuits. The alternate circuit starts at one node Xj and ends in another node Xk, j<k, both nodes Xj and Xk lie on the original circuit .

One advantage of the present invention is that it allows better utilisation of the bandwidth provided by e.g. STM-1 frames or fibre optical links used for the ATM.

Another advantage of the present invention is that it prevents the energies of bursts in the network from summing up as described above. Another advantage of the present invention is that it can be used for compressed video transmission.

Another advantage of the present invention is that capacity of the outgoing links can be extended logically by means of the capacity on other outgoing data links.

Another advantage of the present invention is that this invention can handle variable bandwidths in the data networks .

Another advantage of the present invention is that this invention can handle bursts on individual links.

The invention is now being described further with the help of the detailed description of preferred embodiments and attached drawings .

BRIEF DESCRIPTION OF THE DRAWINGS

Figure la shows a periodic frame for STM-1 format, prior art.

Figure lb shows an ATM cell format, prior art.

Figure 2 shows an original circuit, prior art.

Figure 3 shows an original circuit and 3 alternate circuits according to the invention.

Figure 4 shows connection of burst detectors and arbiters according to the invention.

Figure 5 shows the definition of bursts.

DETAILED DESCRIPTION OF EMBODIMENTS Fig. 3 and Fig. 4 show one embodiment of the present invention. Figure 3 shows the same network as in Fig. 2 and additional alternate circuits, which are nodes 302, 306 and 304 connected by alternate links 308-314 and 316, 318. These alternate nodes and links have not been used by the original circuit, Fig. 2. The network 300 consists of the original circuit and the alternate circuit, which have several ATM nodes 202-212 and various data links 214-224 between them. In order to transport the data from a source Xo 202, Fig. 2, to a destination Xk 212, usually some intermediate nodes Xl,...#Xk-l 204-210 are used, i.e. the data are transmitted from Xo via Xl,..,Xk-l to Xk by means of the data links 214- 222. The network 300 shows a first alternate circuits via ATM nodes 302, 208 306 and links 308-314, a second alternative circuit via ATM node 304 and links 316, 318, a third alternative circuit via ATM node 302 and links 308, 310, and a fourth alternative circuit via ATM node 306 and links 312, 314. An alternative link 506 goes to an ATM node, which is not shown in the figure. Depending on which node in the network 300 is heavily loaded with bursts, one of the above mentioned alternate circuits can be used to transport ATM cells .

Figure 4 shows the intermediate node 208, which has the alternate links 310, 312, 506 connected to overcome the problems stated before. The incoming burst detectors 402-412 detect bursts on the incoming virtual circuits on links 218, 310. There is one incoming burst detector required for each original or alternate virtual circuit. The outgoing burst detectors 428-432 detect bursts on the outgoing links 220, 312, 506. There is one such detector required for each of the outgoing links 220, 312, 506 that is used for original or alternate virtual circuits. The techniques for implementing the incoming and outgoing burst detectors are the same, so they are described together below. Each of the burst detectors 402-412 and 428-432 at the incoming links 218, 310 and the outgoing links 220, 312, 506 are connected to arbiters 414-426. An arbiter is connected to one burst detector of an incoming original circuit and to the burst detectors at every outgoing link over which either this original circuit or an alternate circuit for it is established. One example is shown of how incoming burst detector 408 is connected to an arbiter 420, via link 446, to a switch core 482, via links 470-474, to each of the outgoing burst detectors 420-432, via links 476-40, and in its turn to the outgoing links 220, 312, 506. The same type of connection for each of the incoming burst detectors 402-412 to each of the outgoing burst detectors 428-432 as described before. An switch port 434, 436 is connected to each incoming link 218, 310 and in its other end connected to the arbiters 414-426 via links 452-456 and 464-468. Each switch port is connected so that all of the arbiters for each incoming link has a connection.

The arbiters 414-426 decide whether to change to a different virtual circuit or not, in case a burst occurs. Nodes 302 and 306 are shown to illustrate that there may be the first alternate circuit along the whole original circuit so that every link along the original circuit 204-224 is "backed up" by the first alternate circuit 204, 302, 208, 306, 212, the second alternate circuit 204, 206, 304, 210, 212, the third alternate circuit 204, 206, 208, 306, 212 and a fourth alternative circuit 204, 302, 208, 210, 212. An ATM node usually consists of the switch core 482, that connects switch ports 434, 436 at incoming links 310, 218 to switch ports to the outgoing links 220, 312, 506. The interfaces at the incoming links usually decide to which outgoing link a particular ATM cell is routed through the switch core and which VPI/VCI the cell will have. That is, the interfaces at the incoming link implement the mapping mj mentioned above.

Without using this invention, the mapping m is only modified, when virtual circuits are created or removed by an according management procedure. With this invention, the mapping may also be modified by the arbiters 414-426 in case of bursts.

In normal traffic flow the intermediate node 208 is in a state where the cells of a particular original circuit are routed from incoming link 218 to outgoing link 220. Assume that the third alternate circuit 208, 306, 212 has been set up from node 208 and links 312, 314 to node 212. In case a burst occurs on the original circuit and causes the outgoing link 220 to get overloaded, then the arbiter 420, Fig. 4, would recognise this situation by means of the incoming burst detector 408 and the outgoing burst detector 432. If the arbiter 420 also finds free bandwidth available on outgoing link 312, it would decide to send the cells over the alternate circuit rather than over the original circuit. This decision modifies the mapping mj in the switch port 434.

Figure 4 shows a typical implementation, where the arbiter 420 is located close to the interface 434 at the incoming link 218 and where the available bandwidth at the outgoing links 220, 312, 506 is reported to the arbiters 420-426 via ATM cells through the switch core 482. In this case, the information about available bandwidth would go via 446,470- 480. The burst detectors and arbiters not mentioned are shown to indicate, that other virtual circuit may have burst detectors and arbiters as well.

This invention is realised using three kinds of entities: burst detectors, arbiters and signalling connections.

The purpose of burst detectors is to monitor either the incoming virtual circuits and to provide the information about the energies of the bursts on them, or the outgoing virtual circuit to detect lack of capacity. This information about the energies can later be used by the arbiters in order to select those bursts which are to be transmitted over the alternate circuit. Burst detectors may be implemented in hardware or in software, depending on the technology used for implementing the node. The function of the burst detectors is already implemented in state of the art of the ATM nodes and is known as a UPC (user parameter control) function. The difference between the burst detectors used in this invention and the UPC function is, that the UPC function is used to discard cells in case the reserved bandwidth α is exceeded, while the burst detector used in this invention would instead report this fact to arbiters. A typical implementation of a burst detector is a circular buffer (FIFO) . For each ATM cell received, the time when it arrives, called the time stamp of the cell, is stored in the buffer. The difference between the first and the last time stamp in the buffer is inversely proportional to the bandwidth of the cells considered.

The arbiters 414-426 are specific state machines driven by the events that bursts occur or that bursts end, and are optionally provided with the energy of those bursts. Upon reception of such events, the arbiters change their state and may, depending on the particular state change, decide to route ATM cells along a different original or alternate virtual circuit . Arbiters may be implemented in hardware or software, depending on the technology used for implementing the node. A simple arbiter implementation could, for instance, detect that its associated e.g. original circuit causes overflow at the outgoing link of that original circuit and decide to continue the transmission of ATM cells on that alternate circuit, whose outgoing link has the most available capacity.

In the following the term "signalling connection" is used for a means of sending protocol information from a node xj to a another node xk. The signalling connections are used to the transfer protocol information from the starting node Xj of the alternate circuit to the corresponding ending node Xk-

This signalling connection is considered logically. In practice the ATM cells belonging to the signalling connection are transmitted along the same links as the original or alternate circuit, but with highest priority indicated in the CLP field of the ATM header. If the arbiter 408 in Xj 208 decides to route ATM cells along e.g. the third alternate circuit rather than along the original circuit (or vice versa) then node Xk 212 should be informed about that decision. Xk will eventually recognise that there are no more cells sent over the original circuit and instead cells are received over the third alternate circuit. The time required to send a cell over the alternate link 312 to Xk 212 may, however, be shorter than the time required to send it over the original circuit. That is, the cells sent on the alternate links 312, 314 after Xj 208 has changed from the original link to the alternate link 312 may arrive at Xk 212 before the last cells sent on the original links 220, 222 arrive at Xk- The node Xk 208 might thus misinterpret a short gap in the transmission on the original circuit, together with the reception of cells on the third alternate circuit, as the end of cell transmission on the original circuit. The cells received on the original circuit after the gap would then need to be discarded, or even worse, would be considered as another change from the third alternate circuit back to the original circuit. For this reason it is required that Xj

208 informs Xk 212 about changes from e.g. the original circuit to the third alternate circuit. This is the purpose of the signalling connection. The signalling connection can be implemented as special ATM cells that are sent from Xj 208 to Xk 212 when Xj changes e.g. from the original circuit to the third alternate circuit . In this case they would be sent on the original circuit and thus mark the end of the transmission on the original circuit. The node Xk would then buffer cells received on the third alternate circuit until these special cells are received on the original circuit. ATM cells belonging to the signalling connection can in practice be sent either with the same VPI/VCI, but e.g. different payload type (PT) , or with a different VPI/VCI that is specifically used for this purpose. In any case, these signalling cells will have their cell loss priority (CLP) set such that they are not discarded. In certain cases described below the signalling connection is not required.

A method for setting up an original circuit is done in the following steps: first step, create the original circuit, which will reserve the bandwidth, but the traffic is disabled; second step, to activate the original circuit, which enables the traffic; third step, to deactivate the original circuit, which disables the traffic; final step, remove the original circuit, which releases the bandwidth reserved. The steps 2 and 3 may be repeated several times during the lifetime of the original circuit. In case of the alternate circuits, the four steps have to be done for each of the alternate circuits as well.

Regarding the arbiter 420 the following is done. After all the original and alternate circuits have been created, the arbiter 420 for those circuits is created and provided with the information as to which of the circuits belong to which. On activation/deactivation of some the original/alternative circuits, the arbiter 420 is informed about that event. In this way, the arbiter knows which of the circuits are actually available for transferring the traffic.

As long as no burst is indicated for the original circuit on incoming link 218, by the burst detector 408, the arbiter 420 takes no action. As long as a burst K occurs, the arbiter 420 monitors the outgoing link 220 for free bandwidth being available. As soon as the arbiter 420 recognises lack of bandwidth on the currently used outgoing link 220, the arbiter 420 chooses another outgoing link 312 based on some appropriate mechanism. The traffic is then changed over to the outgoing link 312. In case no available bandwidth is detected by the arbiter 420, no action is taken. The frequency of how often the arbiter 420 changes the links should be limited by the arbiter 420 in order to avoid confusing the far end. Because the different virtual circuits/paths have different propagation delays, measures must be taken to guarantee in sequence delivery of the ATM cells. The critical point exists when some of the arbiters decide to change the outgoing links. If no cells are to be discarded, the first problem is to detect at the receiving end that some of the arbiters have decided to change the outgoing link. There are several options :

The first option is that the arbiter 420 sends one or more special cells on the outgoing link 220 in order to indicate the change of the outgoing link 220 to the receiving side.

These special cells need to be sent with the highest priority, indicated in the CLP field of the ATM header, so that they are not discarded. The receiving side recognises the change of the outgoing link 220 by the reception of these special cells. The outgoing link 220 is the one where the burst is detected. The outgoing link 312 is the one chosen by the arbiter 420, where the cells will be sent on. Changing the outgoing link 220, means stop sending the cells over the outgoing link 220 and instead sending the cells over the outgoing link 312.

The second option for arbiters 414-426 at the receiving side is to monitor both the original circuit and the alternate circuit. Normally only one virtual circuit receives the cells. If, at some time, cells are received on a different virtual circuit, then some arbiter has decided to change from original to alternate circuit or vice versa. Since the arbiters do not decide this, the receiver, which is the node 212 where both the original circuit and the alternate circuit join again, is able to detect the change. This method may be used alone or in conjunction with option under number 1. After the change has been detected by the receiver, then the potential difference in the cell delay has to be compensated. If the cell delay on the new links 312, 314 is longer than on the previous links 220, 222, then all cells on the previous link are received at the far end before any cells are received on the links 312, 314 and no action is required. No action means that the cells arriving are immediately send out on the outgoing link 224, as opposed to buffering them. Otherwise the receiver needs to buffer the cells received via links 312, 314 until no more of the cells are received via links 220/222. The difference between options 1 and this is that in option 1 the change may be recognised earlier and thus smaller buffers are required and the total cell delay is reduced.

The third option for arbiters 414-426 at the receiving side is not to join the circuits together at all but rather to leave this to the ATM adaptation layer (AAL) of the receiver. The adaptation layer is a layer above the ATM layer that uses the services of the ATM layer in order to transfer information. The third option basically means that the ATM node does not bother to guarantee in sequence delivery, although this is a requirement for ATM in general, and instead let the receiver reconstruct the in sequence delivery. An application for this is the transport of UDP (user datagram protocol) packets over the virtual circuit. Each UDP packet is packed into one or more ATM cells and then transmitted to the far end. At the far end, the AAL collects the received ATM cells and reconstructs the original UDP packet. If some node would e.g. change from an original circuit to the alternate circuit, then the far end would receive the ATM cells from different virtual circuits. Due to the differences in cell delay, the far end would possibly reconstruct the UDP packets in a different order than they were sent. Also, one UDP packet would be lost, if the change from the original to the alternate circuits happens in the middle of the UDP package. All this would not matter at all, however, since the UDP neither guarantees the in sequence delivery of UDP packets nor the reliable transport of UDP packets. Thus this third option is ideal for transmission of UDP packets in particular and of connectionless data services in general . Another advantage is that this invention could be applied to single nodes in an ATM network without the need to agree on a protocol, which would be the case when using the signalling connection.

The ATM nodes that are involved in the alternate circuits are operated in the following way: When a call is set up the alternate circuits, for each of the original circuits, are established in addition to the original circuit, by means of appropriate management procedures. Then the nodes are operated as usual. In case the capacity of one outgoing link, 220, is going to be exceeded, the following procedure is executed: The circuit causing the overload condition of the outgoing link 220 is determined. The burst detectors provide the necessary information to identify these circuits. A subset S={Pι, ... , Pk} of all such circuits is chosen in such a way that the outgoing link 220 without the ATM cells belonging to any Pi is no longer overloaded and k is small, i.e. S contains those bursts with high energy.

For each circuits Pi in S a signalling cell C(Pi) is transmitted over the signalling connection. The cell C(Pi) indicates, that the transmission is continued over an alternate circuit, i.e. no more cells are transmitted over the original circuit. Each node transceiving (i.e. receiving and transmitting) C(Pi) is potentially the end node of an alternate circuit and prepares itself for the reception of the cells over the alternate circuit. The node receiving the data from the alternate circuit without receiving the C(Pj_.) has to wait for the C(Pi) before it starts the transceiving of the data on the alternate circuit. This is necessary in order to maintain the in-sequence delivery of the ATM cells. This means that if one sends cells 1, 2, 3... one after the other then the other side receives cells 1, 2, 3 in that order, as opposed to for example 1, 3, 2.

As soon as the congested node has generated the transmitted C(Pi), it resumes the transmission of the cells belonging to the circuit Pi over the alternate circuit. This alternate circuit is chosen in such a way that the capacity of the outgoing links is distributed as equally as possible in order to prevent other outgoing links to be overloaded as a consequence of using the alternate circuits.

At some later time T the node may decide to resume the transmission over the original circuit. This is done in the same way as the switching to the alternate circuit. There are several options (strategies) to chose T: An obvious option is to choose T as the first time the outgoing link causing the transmission over the alternate circuit is no longer overloaded. Another, less obvious but possibly better, option is to choose T as the first time when the outgoing link belonging to the alternate circuit becomes overloaded. This strategy has some potential of self-organisation of virtual circuits transferring bursty traffic.

Note that the nodes at the beginning and at the end of a particular alternate circuit are the only nodes that know whether the circuit is the original or the alternate one. Therefore the procedure described above may be recursively applied to the alternate circuits on order to deal with the bursts on the alternate circuits causing overloads on the other nodes along the alternate circuits.

An alternative way to implement the burst detectors in hardware is to make the detector, so it contains a counter which decrements at a fixed rate until it reaches zero. The decrement rate determines the bandwidth threshold. Each of the cells that belongs to the circuit on which the bursts are to be detected, increments the counter until some maximum value of the counter is reached. As long as the counter value is above a certain value, the burst condition is indicated. The counter provides a single output that, is either logically true, when a burst is detected, otherwise logically false. This algorithm is known as the "leaky bucket" algorithm.

Another alternative way to implement burst detectors is to implement the way described for hardware detectors above in software.

Another alternative way to provide the arbiter with the information required from the peak detectors is to use special ATM cells inside the ATM switch. Some current implementations of the ATM nodes consist of the switch ports that are connected to a switch core. The main purpose of the switch core is to transmit cells received from one of the switch ports to some other switch port. The information required for the switch core to perform this task is generated in the switch ports. The information about the capacity available on the outgoing links may be packed into special cells. These cells are either generated at some appropriate rate or when required. These special cells are then broadcast to all switch ports through the switch core. The switch core has very little functionality, but runs at very high cell rates. In contrast, the switch ports have much more functionality, but run at lower cell rates. The switch ports are typically able to generate the ATM cells.

The invention described above may be embodied in yet other specific forms without departing from the spirit or essential characteristics thereof. Thus, the present embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing descriptions, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. An ATM node belonging to an original circuit of ATM nodes, where the ATM nodes having links connected between them, c h a r a c t e r i z e d in that the node (208) is connected to at least one alternate circuit of ATM nodes (302,306), wherein the alternate ATM nodes being connected to alternate links (308-314) , and in that the node comprises means for detecting bursts (402-412, 428-432) and at least one arbiter (420) .

2. A node according to claim 1, c h a r a c t e r i z e d in that the means for detecting bursts belong to the original circuit, said means can be an incoming and an outgoing burst detector (408, 432) , wherein said node (208) has at least one incoming burst detector (408) for the incoming link (218) on the original circuit and at least one outgoing burst detector (432) for the outgoing link (220) on the original circuit, and in that the incoming and outgoing burst detectors are connected to the arbiter (420) .

3. A node according to claim 1, c h a r a c t e r i z e d in that the means for detecting bursts belong to the alternative circuit, said means can be an incoming and an outgoing burst detector (402, 430), wherein said node (208) has at least one incoming burst detector (402) for the incoming link (310) on the alternative circuit and at least one outgoing burst detector (430) for the outgoing link (312) on the alternative circuit, and in that the incoming and outgoing burst detectors are connected to the arbiter (414) .

4. A node according to claim 1, c h a r a c t e r i z e d in that the means for detecting bursts (402-412, 428-432) are provided to be a circular buffer for time stamps used to detect the bursts or to determine the energy of the bursts.

5. A node according to claim 1, c h a r a c t e r i z e d in that the arbiter (420) is provided to decide whether to change to a different circuit or not, in case the bursts occurs .

6. A node according to claim 1, c h a r a c t e r i z e d in that each of the incoming links (218, 310) from the original and alternative circuits has a switch port (434, 436) connected in-between the incoming link and the arbiter (s) (414-426) .

7. A node according to claim 1, c h a r a c t e r i z e d in that a switch core (482) is located between the arbiters (414-426) and the outgoing burst detectors (428-432) .

8. A network consisting of an original circuit of ATM nodes, such claimed in any of previous claims, and links between them; the original circuit having a source node, a destination node, and zero or more intermediate nodes, c h a r a c t e r i z e d in that the network (300) also has at least one alternate circuit of ATM nodes (302-306) and between them alternate links (308-318) , where at least one of the nodes (208) comprises burst detectors (408,432) and at least one arbiter (420) .

9. A method for switching over from a first ATM node, said ATM node belonging to an original circuit of ATM nodes, the ATM nodes having links connected between them, to a second ATM node in a network, c h a r a c t e r i z e d in that the method comprises the steps of: setting up an original circuit from the first node; setting up the alternate circuit from the first node; detecting a burst in the first node on the original circuit; and deciding to change over from the original circuit to the alternate circuit.

10. A method for switching over from a first ATM node to a second ATM node in a network according to claim 9, c h a r a c t e r i z e d in that the method for setting up the alternate circuit is done in the following steps: creating the alternate circuit; activating the alternate circuit; deactivating the alternate circuit; and removing the alternate circuit .

11. A method for switching over from a first ATM node to a second ATM node in a network according to claim 10, c h a r a c t e r i z e d in that the method comprises the steps of setting up the alternate circuit from the first node, detecting the burst in the first node on the original circuit, and in that these steps can be repeated several times during the lifetime of the alternate circuit.

12. A method for switching over from a first ATM node to a second ATM node in a network according to claim 10, c h a r a c t e r i z e d in that the method for setting up the alternate circuit can be repeated several times during the lifetime of the alternate circuit.

13. A method for switching over from a first ATM node to a second ATM node in a network according to claim 10, c h a r a c t e r i z e d in that the alternative circuit can be recursively set up.

14. A method for switching over from a first ATM node to a second ATM node in a network according to claim 9, c h a r a c t e r i z e d in that an incoming burst detector (408) detects bursts on the original circuits on the incoming link (218) , and/or in that an outgoing burst detector (432) detects bursts on the outgoing link (220) .

15. A method for switching over from a first ATM node to a second ATM node in a network according to claim 14, c h a r a c t e r i z e d in that the decision to change over from the original circuit to the alternative circuit is determined by the energy of the bursts on the original circuit and on the outgoing links (220) .

16. A method for switching over from a first ATM node to a second ATM node in a network according to claim 9, c h a r a c t e r i z e d in that the method for avoiding the cumulating of energies of concurrent bursts is provided by switching over from the first ATM node to the second ATM node wherein one or more of the concurrent bursts are sent to the second ATM node .

17. A method for switching over from a first ATM node to a second ATM node in a network according to claim 9, c h a r a c t e r i z e d in that the method for decreasing the additional transmission delay caused in concurrent bursts of packets of connectionless data services transported on virtual circuits is provided by switching over from the first ATM node to the second ATM node wherein one or more of the concurrent bursts are sent to the second ATM node.