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About this book
A critical step in the design of a DSP system is to identify for each of its components (DSP kernels) an implementation architecture that provides the desired degree of flexibility/programmability and optimises the area-delay-power parameters. The book covers the entire solution space comprising both hardware multiplier-based and multiplex-less architectures that offer varying degrees of programmability. For each of the implementation styles, several algorithmic and architectural transformations are proposed so as to optimally implement weighted-sum based DSP kernels over the area-display-power space.
VLSI Synthesis of DSP Kernels presents the following: Six different target implementation styles - For each of the implementation styles, description and analysis of several algorithmic and architectural transformations aimed at one or more of reduced area, higher performance and low power; Automated and semi-automated techniques for applying each of these transformations; and Classification of the transformations based on the properties that they exploit and their encapsulation in a design framework. A methodology that uses the framework to systematically explore the application of these transformations depending on the characteristics of the algorithm and the target implementation style. VLSI Synthesis of DSP Kernels is essential reading for designers of both hardware- and software-based DSP systems, developers of IP modules for DSP applications, EDA tools developers, researchers and managers interested in getting a comprehensive overview of current trends and future challenges in optimal implementations of DSP kernels. It will also be suitable for graduate students specialising in the area of VLSI Digital Signal Processing.
VLSI Synthesis of DSP Kernels presents the following:
- Programmable DSP-based implementation;
- Programmable processors with no dedicated hardware multiplier;
- Implementation using hardware multiplier(s) and adder(s);
- Distributed Arithmetic (DA)-based implementation;
- Residue Number System (RNS)-based implementation; and
- Multiplier-less implementation (using adders and shifters) for fixed coefficient DSP kernels.
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Table of contents (9 chapters)
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Front Matter
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Back Matter
Reviews
From the reviews:
"This book is devoted to describing the extremely fruitful ‘marriage’ between digital signal processing (DSP) and integrated circuit technology. … The present book is a generous and most qualified offer to all developers, either researchers or managers interested in VLSI and DSP, but especially to practicing system designers involved in both hardware and software optimal implementation of DSP kernels." (Neculai Curteanu, Zentralblatt MATH, Vol. 1050, 2005)
Authors and Affiliations
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Bibliographic Information
Book Title: VLSI Synthesis of DSP Kernels
Book Subtitle: Algorithmic and Architectural Transformations
Authors: Manesh Mehendale, Sunil D. Sherlekar
DOI: https://doi.org/10.1007/978-1-4757-3355-6
Publisher: Springer New York, NY
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eBook Packages: Springer Book Archive
Copyright Information: Springer Science+Business Media New York 2001
Hardcover ISBN: 978-0-7923-7421-3Published: 30 June 2001
Softcover ISBN: 978-1-4419-4904-2Published: 03 December 2010
eBook ISBN: 978-1-4757-3355-6Published: 17 April 2013
Edition Number: 1
Number of Pages: XXIV, 210
Topics: Circuits and Systems, Electrical Engineering, Computer-Aided Engineering (CAD, CAE) and Design