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VLSI Algorithms and Architectures

Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986. Proceedings

  • Conference proceedings
  • © 1986

Overview

Editors:
  1. Filia Makedon
  2. Kurt Mehlhorn
  3. T. Papatheodorou
  4. P. Spirakis

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 227)

  • 4978 Accesses

  • 1 Citation

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Table of contents (29 papers)

  1. Front Matter

    Download chapter PDF

  2. Digital filtering in VLSI

    • G. Bilardi, F. P. Preparata
    Pages 1-11

  3. Two processor scheduling is in NC

    • David Helmbold, Ernst Mayr
    Pages 12-25

  4. Breaking symmetry in synchronous networks

    • Greg N. Frederickson, Nicola Santoro
    Pages 26-33

  5. Parallel ear decomposition search (EDS) and st-numbering in graphs

    • Yael Maon, Baruch Schieber, Uzi Vishkin
    Pages 34-45

  6. A unifying framework for systolic designs

    • Concettina Guerra
    Pages 46-56

  7. Optimal tradeoffs for addition on systolic arrays

    • Alok Aggarwal, J. Lawrence Carter, S. Rao Kosaraju
    Pages 57-69

  8. On the connection between hexagonal and unidirectional rectangular systolic arrays

    • Günter Rote
    Pages 70-83

  9. Lower bounds for sorting on mesh-connected architectures

    • Manfred Kunde
    Pages 84-95

  10. Diogenes, circa 1986 Ψαχνω για ενα τιμιo ανϑρoπo

    • Arnold L. Rosenberg
    Pages 96-107

  11. Nonsequential computation and laws of nature

    • Paul M. B. Vitángi
    Pages 108-120

  12. Linear algorithms for two CMOS layout problems

    • Rolf Müller, Thomas Lengauer
    Pages 121-132

  13. Some new results on a restricted channel routing problem

    • E. Lodi, L. Pagli
    Pages 133-143

  14. Efficient modular design of TSC checkers for m-out-of-2m codes

    • A. M. Paschalis, D. Nikolos, C. Halatsis
    Pages 144-155

  15. Vlsi algorithms and pipelined architectures for solving structured linear system

    • I-Chang Jou, Yu-Hen Hu, T. M. Parng
    Pages 156-165

  16. A high-performance single-chip vlsi signal processor architecture

    • Nick Kanopoulos, Peter N. Marinos
    Pages 166-179

  17. Exploiting hierarchy in VLSI design

    • T. Lengauer
    Pages 180-193

  18. A polynomial algorithm for recognizing images of polyhedra

    • Lefteris M. Kirousis
    Pages 194-204

  19. Parallel tree techniques and code optimization

    • Eliezer Dekel, Simeon Ntafos, Shie-Tung Peng
    Pages 205-216

  20. AT2-optimal galois field multiplier for VLSI

    • Martin Fürer, Kurt Mehlhorn
    Pages 217-225
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